From 4263f062b0cbdbc4cfc338386acb065acf70efce Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Tue, 8 Oct 2013 19:16:27 -0500 Subject: [PATCH] [JITArmIL] Fix JITIL compiling on x86. --- Source/Core/Core/CMakeLists.txt | 9 +-- .../Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp | 2 +- Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h | 11 +++- Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h | 2 +- .../Core/Src/PowerPC/JitCommon/JitBackpatch.h | 14 +++++ .../PowerPC/JitILCommon/JitILBase_Integer.cpp | 57 +++++++++---------- Source/Core/Core/Src/x64MemTools.cpp | 2 +- 7 files changed, 53 insertions(+), 44 deletions(-) diff --git a/Source/Core/Core/CMakeLists.txt b/Source/Core/Core/CMakeLists.txt index e172af43c5..67d77b53db 100644 --- a/Source/Core/Core/CMakeLists.txt +++ b/Source/Core/Core/CMakeLists.txt @@ -175,6 +175,7 @@ set(SRCS Src/ActionReplay.cpp Src/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp Src/PowerPC/JitILCommon/JitILBase_Paired.cpp Src/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp + Src/PowerPC/JitILCommon/JitILBase_Integer.cpp ) if(NOT _M_GENERIC) @@ -182,15 +183,7 @@ if(NOT _M_GENERIC) Src/x64MemTools.cpp Src/PowerPC/Jit64IL/IR_X86.cpp Src/PowerPC/Jit64IL/JitILAsm.cpp - Src/PowerPC/Jit64IL/JitIL_Branch.cpp Src/PowerPC/Jit64IL/JitIL.cpp - Src/PowerPC/Jit64IL/JitIL_FloatingPoint.cpp - Src/PowerPC/Jit64IL/JitIL_Integer.cpp - Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp - Src/PowerPC/Jit64IL/JitIL_LoadStoreFloating.cpp - Src/PowerPC/Jit64IL/JitIL_LoadStorePaired.cpp - Src/PowerPC/Jit64IL/JitIL_Paired.cpp - Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp Src/PowerPC/Jit64IL/JitIL_Tables.cpp Src/PowerPC/Jit64/Jit64_Tables.cpp Src/PowerPC/Jit64/JitAsm.cpp diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp index 6eff9056eb..2a9ee715bb 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp @@ -24,7 +24,7 @@ The register allocation is linear scan allocation. #pragma warning(disable:4146) // unary minus operator applied to unsigned type, result still unsigned #endif -#include "IR.h" +#include "../JitILCommon/IR.h" #include "../PPCTables.h" #include "../../CoreTiming.h" #include "../../HW/Memmap.h" diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h index c05d9cc889..f80b8c8e2e 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h @@ -45,10 +45,11 @@ #define DISABLE64 #endif -class JitIL : public JitILBase, public Jitx86Base +class JitIL : public JitILBase, public EmuCodeBlock { private: - + JitBlockCache blocks; + TrampolineCache trampolines; // The default code buffer. We keep it around to not have to alloc/dealloc a // large chunk of memory for each recompiled block. @@ -74,6 +75,12 @@ public: void Trace(); + JitBlockCache *GetBlockCache() { return &blocks; } + + const u8 *BackPatch(u8 *codePtr, u32 em_address, void *ctx) { return NULL; }; + + bool IsInCodeSpace(u8 *ptr) { return IsInSpace(ptr); } + void ClearCache(); const u8 *GetDispatcher() { return asm_routines.dispatcher; // asm_routines.dispatcher diff --git a/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h b/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h index 9d7bdd3e26..ccbf35bc28 100644 --- a/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h +++ b/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h @@ -43,7 +43,7 @@ public: JitBaseBlockCache *GetBlockCache() { return &blocks; } - const u8 *BackPatch(u8 *codePtr, u32 em_address, void *ctx) {} + const u8 *BackPatch(u8 *codePtr, u32 em_address, void *ctx) { return NULL; } bool IsInCodeSpace(u8 *ptr) { return IsInSpace(ptr); } diff --git a/Source/Core/Core/Src/PowerPC/JitCommon/JitBackpatch.h b/Source/Core/Core/Src/PowerPC/JitCommon/JitBackpatch.h index 5859962853..590b0efd75 100644 --- a/Source/Core/Core/Src/PowerPC/JitCommon/JitBackpatch.h +++ b/Source/Core/Core/Src/PowerPC/JitCommon/JitBackpatch.h @@ -107,6 +107,19 @@ #define CTX_R15 gregs[REG_R15] #define CTX_RIP gregs[REG_RIP] #elif defined(_M_IX86) + #ifdef ANDROID + #include + typedef sigcontext SContext; + #define CTX_EAX eax + #define CTX_EBX ebx + #define CTX_ECX ecx + #define CTX_EDX edx + #define CTX_EDI edi + #define CTX_ESI esi + #define CTX_EBP ebp + #define CTX_ESP esp + #define CTX_EIP eip + #else #include typedef mcontext_t SContext; #define CTX_EAX gregs[REG_EAX] @@ -118,6 +131,7 @@ #define CTX_EBP gregs[REG_EBP] #define CTX_ESP gregs[REG_ESP] #define CTX_EIP gregs[REG_EIP] + #endif #elif defined(_M_ARM) // Add others if required. typedef struct sigcontext SContext; diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Integer.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Integer.cpp index 4ff8361dab..dd1c2b76f8 100644 --- a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Integer.cpp +++ b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Integer.cpp @@ -9,13 +9,8 @@ #include "../../Core.h" // include "Common.h", "CoreParameter.h", SCoreStartupParameter #include "../PowerPC.h" #include "../PPCTables.h" -#include "x64Emitter.h" -#include "JitIL.h" -#include "JitILAsm.h" - -//#define INSTRUCTION_START Default(inst); return; -#define INSTRUCTION_START +#include "JitILBase.h" static void ComputeRC(IREmitter::IRBuilder& ibuild, IREmitter::InstLoc val) { @@ -24,7 +19,7 @@ static void ComputeRC(IREmitter::IRBuilder& ibuild, ibuild.EmitStoreCR(res, 0); } -void JitIL::reg_imm(UGeckoInstruction inst) +void JitILBase::reg_imm(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -92,7 +87,7 @@ void JitIL::reg_imm(UGeckoInstruction inst) } } -void JitIL::cmpXX(UGeckoInstruction inst) +void JitILBase::cmpXX(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -117,7 +112,7 @@ void JitIL::cmpXX(UGeckoInstruction inst) ibuild.EmitStoreCR(res, inst.CRFD); } -void JitIL::boolX(UGeckoInstruction inst) +void JitILBase::boolX(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -170,7 +165,7 @@ void JitIL::boolX(UGeckoInstruction inst) ComputeRC(ibuild, a); } -void JitIL::extsbx(UGeckoInstruction inst) +void JitILBase::extsbx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -181,7 +176,7 @@ void JitIL::extsbx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::extshx(UGeckoInstruction inst) +void JitILBase::extshx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -192,7 +187,7 @@ void JitIL::extshx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::subfic(UGeckoInstruction inst) +void JitILBase::subfic(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -211,7 +206,7 @@ void JitIL::subfic(UGeckoInstruction inst) ibuild.EmitStoreCarry(test); } -void JitIL::subfcx(UGeckoInstruction inst) +void JitILBase::subfcx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -228,7 +223,7 @@ void JitIL::subfcx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::subfex(UGeckoInstruction inst) +void JitILBase::subfex(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -249,7 +244,7 @@ void JitIL::subfex(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::subfx(UGeckoInstruction inst) +void JitILBase::subfx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -261,7 +256,7 @@ void JitIL::subfx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::mulli(UGeckoInstruction inst) +void JitILBase::mulli(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -270,7 +265,7 @@ void JitIL::mulli(UGeckoInstruction inst) ibuild.EmitStoreGReg(val, inst.RD); } -void JitIL::mullwx(UGeckoInstruction inst) +void JitILBase::mullwx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -281,7 +276,7 @@ void JitIL::mullwx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::mulhwux(UGeckoInstruction inst) +void JitILBase::mulhwux(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -295,7 +290,7 @@ void JitIL::mulhwux(UGeckoInstruction inst) } // skipped some of the special handling in here - if we get crashes, let the interpreter handle this op -void JitIL::divwux(UGeckoInstruction inst) { +void JitILBase::divwux(UGeckoInstruction inst) { Default(inst); return; #if 0 int a = inst.RA, b = inst.RB, d = inst.RD; @@ -319,7 +314,7 @@ void JitIL::divwux(UGeckoInstruction inst) { #endif } -void JitIL::addx(UGeckoInstruction inst) +void JitILBase::addx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -330,7 +325,7 @@ void JitIL::addx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::addzex(UGeckoInstruction inst) +void JitILBase::addzex(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -344,7 +339,7 @@ void JitIL::addzex(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::addex(UGeckoInstruction inst) +void JitILBase::addex(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -367,7 +362,7 @@ void JitIL::addex(UGeckoInstruction inst) ComputeRC(ibuild, abc); } -void JitIL::rlwinmx(UGeckoInstruction inst) +void JitILBase::rlwinmx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -381,7 +376,7 @@ void JitIL::rlwinmx(UGeckoInstruction inst) } -void JitIL::rlwimix(UGeckoInstruction inst) +void JitILBase::rlwimix(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -397,7 +392,7 @@ void JitIL::rlwimix(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::rlwnmx(UGeckoInstruction inst) +void JitILBase::rlwnmx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -410,7 +405,7 @@ void JitIL::rlwnmx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::negx(UGeckoInstruction inst) +void JitILBase::negx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -421,7 +416,7 @@ void JitIL::negx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::srwx(UGeckoInstruction inst) +void JitILBase::srwx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -440,7 +435,7 @@ void JitIL::srwx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::slwx(UGeckoInstruction inst) +void JitILBase::slwx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -459,7 +454,7 @@ void JitIL::slwx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::srawx(UGeckoInstruction inst) +void JitILBase::srawx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -485,7 +480,7 @@ void JitIL::srawx(UGeckoInstruction inst) ComputeRC(ibuild, val); } -void JitIL::srawix(UGeckoInstruction inst) +void JitILBase::srawix(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) @@ -502,7 +497,7 @@ void JitIL::srawix(UGeckoInstruction inst) } // count leading zeroes -void JitIL::cntlzwx(UGeckoInstruction inst) +void JitILBase::cntlzwx(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITIntegerOff) diff --git a/Source/Core/Core/Src/x64MemTools.cpp b/Source/Core/Core/Src/x64MemTools.cpp index 62ca755385..a5ed163df7 100644 --- a/Source/Core/Core/Src/x64MemTools.cpp +++ b/Source/Core/Core/Src/x64MemTools.cpp @@ -22,7 +22,7 @@ namespace EMM { -#if defined __APPLE__ || defined __linux__ || defined __FreeBSD__ +#if (defined __APPLE__ || defined __linux__ || defined __FreeBSD__) && !defined(ANDROID) #include void print_trace(const char * msg) {