Merge pull request #9384 from lioncash/mbox-enum
DSP: Convert Mailbox enum into an enum class
This commit is contained in:
commit
41316daf91
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@ -387,8 +387,8 @@ void SDSP::DoState(PointerWrap& p)
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p.Do(step_counter);
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p.DoArray(ifx_regs);
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accelerator->DoState(p);
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p.Do(mbox[0]);
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p.Do(mbox[1]);
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p.Do(m_mailbox[0]);
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p.Do(m_mailbox[1]);
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Common::UnWriteProtectMemory(iram, DSP_IRAM_BYTE_SIZE, false);
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p.DoArray(iram, DSP_IRAM_SIZE);
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Common::WriteProtectMemory(iram, DSP_IRAM_BYTE_SIZE, false);
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@ -228,10 +228,10 @@ enum class ExceptionType
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ExternalInterrupt = 7 // 0x000e external int (message from CPU)
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};
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enum Mailbox : int
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enum class Mailbox
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{
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MAILBOX_CPU,
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MAILBOX_DSP
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CPU,
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DSP
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};
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struct DSP_Regs
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@ -429,9 +429,6 @@ struct SDSP
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u32 iram_crc = 0;
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u64 step_counter = 0;
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// Mailbox.
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std::atomic<u32> mbox[2];
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// Accelerator / DMA / other hardware registers. Not GPRs.
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std::array<u16, 256> ifx_regs{};
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@ -445,6 +442,9 @@ struct SDSP
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u16* coef = nullptr;
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private:
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auto& GetMailbox(Mailbox mailbox) { return m_mailbox[static_cast<u32>(mailbox)]; }
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const auto& GetMailbox(Mailbox mailbox) const { return m_mailbox[static_cast<u32>(mailbox)]; }
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void FreeMemoryPages();
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void DoDMA();
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@ -455,6 +455,7 @@ private:
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u16 ReadIFXImpl(u16 address);
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std::array<std::atomic<u32>, 2> m_mailbox;
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DSPCore& m_dsp_core;
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Analyzer m_analyzer;
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};
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@ -25,21 +25,21 @@ void SDSP::InitializeIFX()
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{
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ifx_regs.fill(0);
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mbox[MAILBOX_CPU].store(0);
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mbox[MAILBOX_DSP].store(0);
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GetMailbox(Mailbox::CPU).store(0);
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GetMailbox(Mailbox::DSP).store(0);
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}
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u32 SDSP::PeekMailbox(Mailbox mailbox) const
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{
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return mbox[mailbox].load();
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return GetMailbox(mailbox).load();
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}
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u16 SDSP::ReadMailboxLow(Mailbox mailbox)
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{
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const u32 value = mbox[mailbox].load(std::memory_order_acquire);
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mbox[mailbox].store(value & ~0x80000000, std::memory_order_release);
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const u32 value = GetMailbox(mailbox).load(std::memory_order_acquire);
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GetMailbox(mailbox).store(value & ~0x80000000, std::memory_order_release);
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if (m_dsp_core.GetInitHax() && mailbox == MAILBOX_DSP)
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if (m_dsp_core.GetInitHax() && mailbox == Mailbox::DSP)
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{
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m_dsp_core.SetInitHax(false);
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m_dsp_core.Reset();
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@ -47,7 +47,7 @@ u16 SDSP::ReadMailboxLow(Mailbox mailbox)
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}
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#if defined(_DEBUG) || defined(DEBUGFAST)
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const char* const type = mailbox == MAILBOX_DSP ? "DSP" : "CPU";
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const char* const type = mailbox == Mailbox::DSP ? "DSP" : "CPU";
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DEBUG_LOG_FMT(DSP_MAIL, "{}(RM) B:{} M:0x{:#010x} (pc={:#06x})", type, mailbox,
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PeekMailbox(mailbox), pc);
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#endif
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@ -57,7 +57,7 @@ u16 SDSP::ReadMailboxLow(Mailbox mailbox)
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u16 SDSP::ReadMailboxHigh(Mailbox mailbox)
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{
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if (m_dsp_core.GetInitHax() && mailbox == MAILBOX_DSP)
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if (m_dsp_core.GetInitHax() && mailbox == Mailbox::DSP)
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{
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return 0x8054;
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}
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@ -68,13 +68,13 @@ u16 SDSP::ReadMailboxHigh(Mailbox mailbox)
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void SDSP::WriteMailboxLow(Mailbox mailbox, u16 value)
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{
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const u32 old_value = mbox[mailbox].load(std::memory_order_acquire);
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const u32 old_value = GetMailbox(mailbox).load(std::memory_order_acquire);
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const u32 new_value = (old_value & ~0xffff) | value;
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mbox[mailbox].store(new_value | 0x80000000, std::memory_order_release);
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GetMailbox(mailbox).store(new_value | 0x80000000, std::memory_order_release);
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#if defined(_DEBUG) || defined(DEBUGFAST)
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const char* const type = mailbox == MAILBOX_DSP ? "DSP" : "CPU";
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const char* const type = mailbox == Mailbox::DSP ? "DSP" : "CPU";
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DEBUG_LOG_FMT(DSP_MAIL, "{}(WM) B:{} M:{:#010x} (pc={:#06x})", type, mailbox,
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PeekMailbox(mailbox), pc);
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#endif
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@ -82,10 +82,10 @@ void SDSP::WriteMailboxLow(Mailbox mailbox, u16 value)
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void SDSP::WriteMailboxHigh(Mailbox mailbox, u16 value)
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{
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const u32 old_value = mbox[mailbox].load(std::memory_order_acquire);
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const u32 old_value = GetMailbox(mailbox).load(std::memory_order_acquire);
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const u32 new_value = (old_value & 0xffff) | (value << 16);
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mbox[mailbox].store(new_value & ~0x80000000, std::memory_order_release);
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GetMailbox(mailbox).store(new_value & ~0x80000000, std::memory_order_release);
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}
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void SDSP::WriteIFX(u32 address, u16 value)
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@ -102,19 +102,19 @@ void SDSP::WriteIFX(u32 address, u16 value)
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break;
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case DSP_DMBH:
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WriteMailboxHigh(MAILBOX_DSP, value);
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WriteMailboxHigh(Mailbox::DSP, value);
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break;
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case DSP_DMBL:
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WriteMailboxLow(MAILBOX_DSP, value);
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WriteMailboxLow(Mailbox::DSP, value);
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break;
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case DSP_CMBH:
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WriteMailboxHigh(MAILBOX_CPU, value);
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WriteMailboxHigh(Mailbox::CPU, value);
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break;
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case DSP_CMBL:
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WriteMailboxLow(MAILBOX_CPU, value);
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WriteMailboxLow(Mailbox::CPU, value);
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break;
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case DSP_DSBL:
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@ -207,16 +207,16 @@ u16 SDSP::ReadIFXImpl(u16 address)
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switch (address & 0xff)
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{
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case DSP_DMBH:
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return ReadMailboxHigh(MAILBOX_DSP);
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return ReadMailboxHigh(Mailbox::DSP);
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case DSP_DMBL:
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return ReadMailboxLow(MAILBOX_DSP);
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return ReadMailboxLow(Mailbox::DSP);
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case DSP_CMBH:
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return ReadMailboxHigh(MAILBOX_CPU);
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return ReadMailboxHigh(Mailbox::CPU);
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case DSP_CMBL:
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return ReadMailboxLow(MAILBOX_CPU);
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return ReadMailboxLow(Mailbox::CPU);
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case DSP_DSCR:
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return ifx_regs[address & 0xFF];
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@ -213,25 +213,25 @@ u16 DSPLLE::DSP_ReadControlRegister()
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u16 DSPLLE::DSP_ReadMailBoxHigh(bool cpu_mailbox)
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{
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return m_dsp_core.ReadMailboxHigh(cpu_mailbox ? MAILBOX_CPU : MAILBOX_DSP);
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return m_dsp_core.ReadMailboxHigh(cpu_mailbox ? Mailbox::CPU : Mailbox::DSP);
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}
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u16 DSPLLE::DSP_ReadMailBoxLow(bool cpu_mailbox)
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{
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return m_dsp_core.ReadMailboxLow(cpu_mailbox ? MAILBOX_CPU : MAILBOX_DSP);
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return m_dsp_core.ReadMailboxLow(cpu_mailbox ? Mailbox::CPU : Mailbox::DSP);
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}
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void DSPLLE::DSP_WriteMailBoxHigh(bool cpu_mailbox, u16 value)
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{
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if (cpu_mailbox)
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{
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if ((m_dsp_core.PeekMailbox(MAILBOX_CPU) & 0x80000000) != 0)
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if ((m_dsp_core.PeekMailbox(Mailbox::CPU) & 0x80000000) != 0)
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{
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// the DSP didn't read the previous value
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WARN_LOG_FMT(DSPLLE, "Mailbox isn't empty ... strange");
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}
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m_dsp_core.WriteMailboxHigh(MAILBOX_CPU, value);
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m_dsp_core.WriteMailboxHigh(Mailbox::CPU, value);
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}
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else
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{
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@ -243,7 +243,7 @@ void DSPLLE::DSP_WriteMailBoxLow(bool cpu_mailbox, u16 value)
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{
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if (cpu_mailbox)
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{
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m_dsp_core.WriteMailboxLow(MAILBOX_CPU, value);
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m_dsp_core.WriteMailboxLow(Mailbox::CPU, value);
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}
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else
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{
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