Merge pull request #8911 from OatmealDome/arm64-fastmem-off
JitArm64: Don't assume fastmem arena is available
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commit
4095fb6c20
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@ -121,7 +121,7 @@ void JitArm64::SafeLoadToReg(u32 dest, s32 addr, s32 offsetReg, u32 flags, s32 o
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if (is_immediate)
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mmio_address = PowerPC::IsOptimizableMMIOAccess(imm_addr, access_size);
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if (is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
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if (jo.fastmem_arena && is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
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{
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EmitBackpatchRoutine(flags, true, false, dest_reg, XA, BitSet32(0), BitSet32(0));
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}
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@ -256,7 +256,7 @@ void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s
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STR(INDEX_UNSIGNED, X0, PPC_REG, PPCSTATE_OFF(gather_pipe_ptr));
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js.fifoBytesSinceCheck += accessSize >> 3;
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}
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else if (is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
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else if (jo.fastmem_arena && is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
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{
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MOVI2R(XA, imm_addr);
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EmitBackpatchRoutine(flags, true, false, RS, XA, BitSet32(0), BitSet32(0));
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@ -599,7 +599,7 @@ void JitArm64::dcbz(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITLoadStoreOff);
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FALLBACK_IF(jo.memcheck);
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FALLBACK_IF(jo.memcheck || !jo.fastmem_arena);
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FALLBACK_IF(SConfig::GetInstance().bLowDCBZHack);
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int a = inst.RA, b = inst.RB;
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@ -167,7 +167,7 @@ void JitArm64::lfXX(UGeckoInstruction inst)
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fprs_in_use[0] = 0; // Q0
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fprs_in_use[VD - Q0] = 0;
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if (is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
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if (jo.fastmem_arena && is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
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{
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EmitBackpatchRoutine(flags, true, false, VD, XA, BitSet32(0), BitSet32(0));
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}
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@ -384,7 +384,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
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MOVI2R(gpr.R(a), imm_addr);
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}
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}
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else if (PowerPC::IsOptimizableRAMAddress(imm_addr))
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else if (jo.fastmem_arena && PowerPC::IsOptimizableRAMAddress(imm_addr))
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{
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EmitBackpatchRoutine(flags, true, false, V0, XA, BitSet32(0), BitSet32(0));
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}
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