Merge pull request #9907 from shuffle2/roundmode-bitfield
make FPSCR.RN an enum
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commit
3c90b657f3
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@ -35,12 +35,12 @@ namespace FPURoundMode
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static const u64 default_fpcr = GetFPCR();
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static u64 saved_fpcr = default_fpcr;
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void SetRoundMode(int mode)
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void SetRoundMode(RoundMode mode)
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{
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// We don't need to do anything here since SetSIMDMode is always called after calling this
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}
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
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void SetSIMDMode(RoundMode rounding_mode, bool non_ieee_mode)
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{
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// When AH is disabled, FZ controls flush-to-zero for both inputs and outputs. When AH is enabled,
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// FZ controls flush-to-zero for outputs, and FIZ controls flush-to-zero for inputs.
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@ -7,28 +7,17 @@
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namespace FPURoundMode
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{
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// TODO: MSVC currently produces broken code:
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// https://connect.microsoft.com/VisualStudio/feedback/details/828892/vc-2013-miscompilation-with-enums-and-bit-fields
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// Once that is fixed, change types in SetRoundMode(), SetSIMDMode(), and in UReg_FPSCR to
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// 'RoundMode'.
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enum RoundMode
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enum RoundMode : u32
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{
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ROUND_NEAR = 0,
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ROUND_CHOP = 1,
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ROUND_UP = 2,
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ROUND_DOWN = 3
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};
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enum PrecisionMode
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{
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PREC_24 = 0,
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PREC_53 = 1,
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PREC_64 = 2
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};
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void SetRoundMode(int mode);
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void SetRoundMode(RoundMode mode);
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode);
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void SetSIMDMode(RoundMode rounding_mode, bool non_ieee_mode);
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/*
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* There are two different flavors of float to int conversion:
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@ -7,10 +7,10 @@
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// Generic, do nothing
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namespace FPURoundMode
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{
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void SetRoundMode(int mode)
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void SetRoundMode(RoundMode mode)
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{
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}
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
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void SetSIMDMode(RoundMode rounding_mode, bool non_ieee_mode)
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{
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}
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void SaveSIMDState()
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@ -14,14 +14,14 @@ namespace FPURoundMode
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static u32 saved_sse_state = _mm_getcsr();
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static const u32 default_sse_state = _mm_getcsr();
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void SetRoundMode(int mode)
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void SetRoundMode(RoundMode mode)
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{
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// Convert PowerPC to native rounding mode.
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static const int rounding_mode_lut[] = {FE_TONEAREST, FE_TOWARDZERO, FE_UPWARD, FE_DOWNWARD};
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fesetround(rounding_mode_lut[mode]);
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}
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
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void SetSIMDMode(RoundMode rounding_mode, bool non_ieee_mode)
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{
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// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
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const u32 EXCEPTION_MASK = 0x1F80;
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@ -7,6 +7,7 @@
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#include "Common/BitField.h"
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#include "Common/CommonTypes.h"
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#include "Common/FPURoundMode.h"
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// --- Gekko Instruction ---
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@ -435,7 +436,7 @@ union UReg_FPSCR
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struct
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{
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// Rounding mode (towards: nearest, zero, +inf, -inf)
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u32 RN : 2;
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FPURoundMode::RoundMode RN : 2;
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// Non-IEEE mode enable (aka flush-to-zero)
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u32 NI : 1;
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// Inexact exception enable
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