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JitArm64: Handle ISI excepction.

This commit is contained in:
degasus 2016-05-14 14:38:57 +02:00
parent 95ebb2991f
commit 37e2e92e33
3 changed files with 29 additions and 19 deletions
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40
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
View File

@ -364,15 +364,9 @@ void JitArm64::Jit(u32)
{ {
ClearCache(); ClearCache();
} }
int block_num = blocks.AllocateBlock(PowerPC::ppcState.pc);
JitBlock *b = blocks.GetBlock(block_num);
const u8* BlockPtr = DoJit(PowerPC::ppcState.pc, &code_buffer, b);
blocks.FinalizeBlock(block_num, jo.enableBlocklink, BlockPtr);
}
const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlock *b) int blockSize = code_buffer.GetSize();
{ u32 em_address = PowerPC::ppcState.pc;
int blockSize = code_buf->GetSize();
if (SConfig::GetInstance().bEnableDebugging) if (SConfig::GetInstance().bEnableDebugging)
{ {
@ -380,6 +374,28 @@ const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitB
blockSize = 1; blockSize = 1;
} }
// Analyze the block, collect all instructions it is made of (including inlining,
// if that is enabled), reorder instructions for optimal performance, and join joinable instructions.
u32 nextPC = analyzer.Analyze(em_address, &code_block, &code_buffer, blockSize);
if (code_block.m_memory_exception)
{
// Address of instruction could not be translated
NPC = nextPC;
PowerPC::ppcState.Exceptions |= EXCEPTION_ISI;
PowerPC::CheckExceptions();
WARN_LOG(POWERPC, "ISI exception at 0x%08x", nextPC);
return;
}
int block_num = blocks.AllocateBlock(em_address);
JitBlock *b = blocks.GetBlock(block_num);
const u8* BlockPtr = DoJit(em_address, &code_buffer, b, nextPC);
blocks.FinalizeBlock(block_num, jo.enableBlocklink, BlockPtr);
}
const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlock *b, u32 nextPC)
{
if (em_address == 0) if (em_address == 0)
{ {
Core::SetState(Core::CORE_PAUSE); Core::SetState(Core::CORE_PAUSE);
@ -395,11 +411,6 @@ const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitB
js.skipInstructions = 0; js.skipInstructions = 0;
js.curBlock = b; js.curBlock = b;
u32 nextPC = em_address;
// Analyze the block, collect all instructions it is made of (including inlining,
// if that is enabled), reorder instructions for optimal performance, and join joinable instructions.
nextPC = analyzer.Analyze(em_address, &code_block, code_buf, blockSize);
PPCAnalyst::CodeOp *ops = code_buf->codebuffer; PPCAnalyst::CodeOp *ops = code_buf->codebuffer;
const u8 *start = GetCodePtr(); const u8 *start = GetCodePtr();
@ -602,9 +613,6 @@ const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitB
js.skipInstructions = 0; js.skipInstructions = 0;
} }
if (code_block.m_memory_exception)
BRK(0x500);
if (code_block.m_broken) if (code_block.m_broken)
{ {
printf("Broken Block going to 0x%08x\n", nextPC); printf("Broken Block going to 0x%08x\n", nextPC);

2
Source/Core/Core/PowerPC/JitArm64/Jit.h
View File

@ -221,7 +221,7 @@ private:
void SafeLoadToReg(u32 dest, s32 addr, s32 offsetReg, u32 flags, s32 offset, bool update); void SafeLoadToReg(u32 dest, s32 addr, s32 offsetReg, u32 flags, s32 offset, bool update);
void SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s32 offset); void SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s32 offset);
const u8* DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlock *b); const u8* DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlock *b, u32 nextPC);
void DoDownCount(); void DoDownCount();
void Cleanup(); void Cleanup();

6
Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp
View File

@ -46,6 +46,8 @@ void JitArm64::GenerateAsm()
dispatcherNoCheck = GetCodePtr(); dispatcherNoCheck = GetCodePtr();
STR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
// This block of code gets the address of the compiled block of code // This block of code gets the address of the compiled block of code
// It runs though to the compiling portion if it isn't found // It runs though to the compiling portion if it isn't found
BFM(DISPATCHER_PC, WSP, 3, 2); // Wipe the top 3 bits. Same as PC & JIT_ICACHE_MASK BFM(DISPATCHER_PC, WSP, 3, 2); // Wipe the top 3 bits. Same as PC & JIT_ICACHE_MASK
@ -63,11 +65,11 @@ void JitArm64::GenerateAsm()
SetJumpTarget(JitBlock); SetJumpTarget(JitBlock);
STR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
MOVI2R(X30, (u64)&::Jit); MOVI2R(X30, (u64)&::Jit);
BLR(X30); BLR(X30);
LDR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
B(dispatcherNoCheck); B(dispatcherNoCheck);
SetJumpTarget(bail); SetJumpTarget(bail);