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Jit_Util: reduce NOP padding of 8 bit loads 

and use MOVSX directly if needed.
This commit is contained in:
Tillmann Karras 2014-04-30 15:15:45 +02:00
parent e659f5ac58
commit 36dbde0f3c
2 changed files with 34 additions and 24 deletions
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3
Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp
View File

@ -206,8 +206,7 @@ const u8 *Jitx86Base::BackPatch(u8 *codePtr, u32 emAddress, void *ctx_void)
{ {
XEmitter emitter(codePtr); XEmitter emitter(codePtr);
int bswapNopCount; int bswapNopCount;
if (info.byteSwap) if (info.byteSwap || info.operandSize == 1)
// MOVBE -> no BSWAP following
bswapNopCount = 0; bswapNopCount = 0;
// Check the following BSWAP for REX byte // Check the following BSWAP for REX byte
else if ((codePtr[info.instructionSize] & 0xF0) == 0x40) else if ((codePtr[info.instructionSize] & 0xF0) == 0x40)

55
Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
View File

@ -98,19 +98,28 @@ u8 *EmuCodeBlock::UnsafeLoadToReg(X64Reg reg_value, Gen::OpArg opAddress, int ac
} }
result = GetWritableCodePtr(); result = GetWritableCodePtr();
MOVZX(32, accessSize, reg_value, MComplex(RBX, opAddress.GetSimpleReg(), SCALE_1, offset)); if (accessSize == 8 && signExtend)
MOVSX(32, accessSize, reg_value, MComplex(RBX, opAddress.GetSimpleReg(), SCALE_1, offset));
else
MOVZX(32, accessSize, reg_value, MComplex(RBX, opAddress.GetSimpleReg(), SCALE_1, offset));
} }
else else
{ {
MOV(32, R(reg_value), opAddress); MOV(32, R(reg_value), opAddress);
result = GetWritableCodePtr(); result = GetWritableCodePtr();
MOVZX(32, accessSize, reg_value, MComplex(RBX, reg_value, SCALE_1, offset)); if (accessSize == 8 && signExtend)
MOVSX(32, accessSize, reg_value, MComplex(RBX, reg_value, SCALE_1, offset));
else
MOVZX(32, accessSize, reg_value, MComplex(RBX, reg_value, SCALE_1, offset));
} }
#else #else
if (opAddress.IsImm()) if (opAddress.IsImm())
{ {
result = GetWritableCodePtr(); result = GetWritableCodePtr();
MOVZX(32, accessSize, reg_value, M(Memory::base + (((u32)opAddress.offset + offset) & Memory::MEMVIEW32_MASK))); if (accessSize == 8 && signExtend)
MOVSX(32, accessSize, reg_value, M(Memory::base + (((u32)opAddress.offset + offset) & Memory::MEMVIEW32_MASK)));
else
MOVZX(32, accessSize, reg_value, M(Memory::base + (((u32)opAddress.offset + offset) & Memory::MEMVIEW32_MASK)));
} }
else else
{ {
@ -118,31 +127,32 @@ u8 *EmuCodeBlock::UnsafeLoadToReg(X64Reg reg_value, Gen::OpArg opAddress, int ac
MOV(32, R(reg_value), opAddress); MOV(32, R(reg_value), opAddress);
AND(32, R(reg_value), Imm32(Memory::MEMVIEW32_MASK)); AND(32, R(reg_value), Imm32(Memory::MEMVIEW32_MASK));
result = GetWritableCodePtr(); result = GetWritableCodePtr();
MOVZX(32, accessSize, reg_value, MDisp(reg_value, (u32)Memory::base + offset)); if (accessSize == 8 && signExtend)
MOVSX(32, accessSize, reg_value, MDisp(reg_value, (u32)Memory::base + offset));
else
MOVZX(32, accessSize, reg_value, MDisp(reg_value, (u32)Memory::base + offset));
} }
#endif #endif
// Add a 2 bytes NOP to have some space for the backpatching switch (accessSize)
if (accessSize == 8) {
NOP(2); case 8:
_dbg_assert_(DYNA_REC, BACKPATCH_SIZE - (GetCodePtr() - result <= 0));
break;
if (accessSize == 32) case 16:
{
BSWAP(32, reg_value);
}
else if (accessSize == 16)
{
BSWAP(32, reg_value); BSWAP(32, reg_value);
if (signExtend) if (signExtend)
SAR(32, R(reg_value), Imm8(16)); SAR(32, R(reg_value), Imm8(16));
else else
SHR(32, R(reg_value), Imm8(16)); SHR(32, R(reg_value), Imm8(16));
break;
case 32:
BSWAP(32, reg_value);
break;
} }
else if (signExtend)
{
// TODO: bake 8-bit into the original load.
MOVSX(32, accessSize, reg_value, R(reg_value));
}
return result; return result;
} }
@ -472,11 +482,12 @@ void EmuCodeBlock::SafeWriteRegToReg(X64Reg reg_value, X64Reg reg_addr, int acce
) )
{ {
MOV(32, M(&PC), Imm32(jit->js.compilerPC)); // Helps external systems know which instruction triggered the write MOV(32, M(&PC), Imm32(jit->js.compilerPC)); // Helps external systems know which instruction triggered the write
u8 *mov = UnsafeWriteRegToReg(reg_value, reg_addr, accessSize, offset, !(flags & SAFE_LOADSTORE_NO_SWAP)); const u8* backpatchStart = GetCodePtr();
if (accessSize == 8) u8* mov = UnsafeWriteRegToReg(reg_value, reg_addr, accessSize, offset, !(flags & SAFE_LOADSTORE_NO_SWAP));
int padding = BACKPATCH_SIZE - (GetCodePtr() - backpatchStart);
if (padding > 0)
{ {
NOP(1); NOP(padding);
NOP(1);
} }
registersInUseAtLoc[mov] = registersInUse; registersInUseAtLoc[mov] = registersInUse;