diff --git a/Source/Core/Core/PatchEngine.cpp b/Source/Core/Core/PatchEngine.cpp
index c416996d25..b2cfa92327 100644
--- a/Source/Core/Core/PatchEngine.cpp
+++ b/Source/Core/Core/PatchEngine.cpp
@@ -231,7 +231,8 @@ static bool IsStackSane()
 
   // Check the link register makes sense (that it points to a valid IBAT address)
   const u32 address = PowerPC::HostRead_U32(next_SP + 4);
-  return PowerPC::HostIsInstructionRAMAddress(address) && 0 != PowerPC::HostRead_U32(address);
+  return PowerPC::HostIsInstructionRAMAddress(address) &&
+         0 != PowerPC::HostRead_Instruction(address);
 }
 
 bool ApplyFramePatches()
diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp
index 5a008f92fc..937cf02fd0 100644
--- a/Source/Core/Core/PowerPC/MMU.cpp
+++ b/Source/Core/Core/PowerPC/MMU.cpp
@@ -423,8 +423,7 @@ TryReadInstResult TryReadInstruction(u32 address)
 
 u32 HostRead_Instruction(const u32 address)
 {
-  UGeckoInstruction inst = HostRead_U32(address);
-  return inst.hex;
+  return ReadFromHardware<XCheckTLBFlag::OpcodeNoException, u32>(address);
 }
 
 static void Memcheck(u32 address, u32 var, bool write, size_t size)