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Merge pull request #898 from FioraAeterna/fprffix 

JIT: make fprf conditional in fcmp, just like the other instructions
This commit is contained in:
Dolphin Bot 2014-08-28 20:25:26 +02:00
parent 5e514dcfbc 7929f2f033
commit 359aa664e1
1 changed files with 11 additions and 5 deletions
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6
Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp
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@ -242,10 +242,12 @@ void Jit64::fcmpx(UGeckoInstruction inst)
int a = inst.FA; int a = inst.FA;
int b = inst.FB; int b = inst.FB;
int crf = inst.CRFD; int crf = inst.CRFD;
bool fprf = Core::g_CoreStartupParameter.bEnableFPRF && js.op->wantsFPRF;
fpr.Lock(a,b); fpr.Lock(a,b);
fpr.BindToRegister(b, true); fpr.BindToRegister(b, true);
if (fprf)
AND(32, M(&FPSCR), Imm32(~FPRF_MASK)); AND(32, M(&FPSCR), Imm32(~FPRF_MASK));
// Are we masking sNaN invalid floating point exceptions? If not this could crash if we don't handle the exception? // Are we masking sNaN invalid floating point exceptions? If not this could crash if we don't handle the exception?
UCOMISD(fpr.R(b).GetSimpleReg(), fpr.R(a)); UCOMISD(fpr.R(b).GetSimpleReg(), fpr.R(a));
@ -270,12 +272,14 @@ void Jit64::fcmpx(UGeckoInstruction inst)
} }
MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_EQ))); MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_EQ)));
if (fprf)
OR(32, M(&FPSCR), Imm32(CR_EQ << FPRF_SHIFT)); OR(32, M(&FPSCR), Imm32(CR_EQ << FPRF_SHIFT));
continue1 = J(); continue1 = J();
SetJumpTarget(pNaN); SetJumpTarget(pNaN);
MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_SO))); MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_SO)));
if (fprf)
OR(32, M(&FPSCR), Imm32(CR_SO << FPRF_SHIFT)); OR(32, M(&FPSCR), Imm32(CR_SO << FPRF_SHIFT));
if (a != b) if (a != b)
@ -284,11 +288,13 @@ void Jit64::fcmpx(UGeckoInstruction inst)
SetJumpTarget(pGreater); SetJumpTarget(pGreater);
MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_GT))); MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_GT)));
if (fprf)
OR(32, M(&FPSCR), Imm32(CR_GT << FPRF_SHIFT)); OR(32, M(&FPSCR), Imm32(CR_GT << FPRF_SHIFT));
continue3 = J(); continue3 = J();
SetJumpTarget(pLesser); SetJumpTarget(pLesser);
MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_LT))); MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_LT)));
if (fprf)
OR(32, M(&FPSCR), Imm32(CR_LT << FPRF_SHIFT)); OR(32, M(&FPSCR), Imm32(CR_LT << FPRF_SHIFT));
} }