ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

docs/DSP: Fix various spelling/grammar/punctuation issues

This commit is contained in:
Pokechu22 2021-07-13 14:15:26 -07:00
parent 2df33ddbbc
commit 35720284f3
1 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
docs/DSP/GameCube_DSP_Users_Manual/GameCube_DSP_Users_Manual.tex
View File

@ -529,7 +529,7 @@ Furthermore, it also contains control bits to configure the flow of certain oper
\section{Product register} \section{Product register}
The product register is a register containing the intermediate product of a multiply or multiply and accumulation operation. The product register is a register containing the intermediate product of a multiply or multiply and accumulation operation.
It's result should never be used for calculation although the register can be read or written. Its result should never be used for calculation although the register can be read or written.
It reflects the state of the internal multiply unit. The product is 40 bits with 1 bit of overflow. It reflects the state of the internal multiply unit. The product is 40 bits with 1 bit of overflow.
\begin{lstlisting}[language=C++] \begin{lstlisting}[language=C++]
@ -859,7 +859,7 @@ Opcode decoding uses special naming for bits and their decimal representations t
\section{Conditional opcodes} \section{Conditional opcodes}
Conditional opcodes are executed only when the condition described by their encoded conditional field has been met. Conditional opcodes are executed only when the condition described by their encoded conditional field has been met.
The groups of conditional instructions are, \Opcode{CALL}, \Opcode{JMP}, \Opcode{IF}, and \Opcode{RET}. The groups of conditional instructions are: \Opcode{CALL}, \Opcode{JMP}, \Opcode{IF}, and \Opcode{RET}.
\begin{table}[H] \begin{table}[H]
\centering \centering
@ -887,7 +887,7 @@ The groups of conditional instructions are, \Opcode{CALL}, \Opcode{JMP}, \Opcode
\textbf{Note:} \textbf{Note:}
There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and \texttt{ZR}/\texttt{NZ}. There are two pairs of conditions that work similarly: \texttt{EQ}/\texttt{NE} and \texttt{ZR}/\texttt{NZ}.
\texttt{EQ}/\texttt{NE} pair operates on arithmetic zero flag (arithmetic 0) while \texttt{ZR}/\texttt{NZ} pair operates on logic zero flag (logic 0). \texttt{EQ}/\texttt{NE} pair operates on arithmetic zero flag (arithmetic 0) while \texttt{ZR}/\texttt{NZ} pair operates on logic zero flag (logic 0).
\pagebreak{} \pagebreak{}
@ -1910,7 +1910,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Load immediate value \Value{I} to register \Register{\$D}. \item Load immediate value \Value{I} to register \Register{\$D}.
Perform and additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -1971,7 +1971,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}. \item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
Decrements register \Register{\$arS}. Decrements register \Register{\$arS}.
Perform additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -1993,7 +1993,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}. \item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
Increments register \Register{\$arS}. Increments register \Register{\$arS}.
Perform additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -2015,7 +2015,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}. \item Move value from data memory pointed by addressing register \Register{\$arS} to register \Register{\$D}.
Add indexing register \Register{\$ixS} to register \Register{\$arS}. Add indexing register \Register{\$ixS} to register \Register{\$arS}.
Perform additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -2036,7 +2036,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from data memory pointed by address \Address{M} (8-bit sign-extended) to register \Register{\$(0x18+D)}. \item Move value from data memory pointed by address \Address{M} (8-bit sign-extended) to register \Register{\$(0x18+D)}.
Perform additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -2330,7 +2330,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Move value from register \Register{\$S} to register \Register{\$D}. \item Move value from register \Register{\$S} to register \Register{\$D}.
Perform additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -2744,7 +2744,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
$acD =- $acD $acD = -$acD
FLAGS($acD) FLAGS($acD)
$pc++ $pc++
\end{DSPOpcodeOperation} \end{DSPOpcodeOperation}
@ -2981,7 +2981,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from register \Register{\$S} to a memory pointed by address \Address{M}. \item Store value from register \Register{\$S} to a memory pointed by address \Address{M}.
Perform additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -3001,7 +3001,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$arD}. Perform additional operation depending on source register. register \Register{\$arD}. Perform an additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -3021,7 +3021,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$arD}. Decrement register \Register{\$arD}. Perform additional operation depending on source register. register \Register{\$arD}. Decrement register \Register{\$arD}. Perform an additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -3042,7 +3042,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$arD}. Increment register \Register{\$arD}. Perform additional operation depending on source register. register \Register{\$arD}. Increment register \Register{\$arD}. Perform an additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -3064,7 +3064,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from source register \Register{\$S} to a memory location pointed by addressing \item Store value from source register \Register{\$S} to a memory location pointed by addressing
register \Register{\$arD}. Add indexing register \Register{\$ixD} to register \Register{\$arD}. register \Register{\$arD}. Add indexing register \Register{\$ixD} to register \Register{\$arD}.
Perform additional operation depending on source register. Perform an additional operation depending on source register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -3085,7 +3085,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Store value from register \Register{\$(0x18+S)} to a memory pointed by address \Address{M} (8-bit sign-extended). \item Store value from register \Register{\$(0x18+S)} to a memory pointed by address \Address{M} (8-bit sign-extended).
Perform additional operation depending on destination register. Perform an additional operation depending on destination register.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -3203,7 +3203,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\end{DSPOpcodeFormat} \end{DSPOpcodeFormat}
\begin{DSPOpcodeDescription} \begin{DSPOpcodeDescription}
\item Test hight part of secondary accumulator \Register{\$axR.h}. \item Test high part of secondary accumulator \Register{\$axR.h}.
\end{DSPOpcodeDescription} \end{DSPOpcodeDescription}
\begin{DSPOpcodeOperation} \begin{DSPOpcodeOperation}
@ -3256,7 +3256,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
\section{Extended opcodes} \section{Extended opcodes}
Extended opcodes do not exist on their own. These opcodes can only be attached to opcodes that Extended opcodes do not exist on their own. These opcodes can only be attached to opcodes that
allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do not modify the program counter (\Register{\$pc} register. allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do not modify the program counter (\Register{\$pc} register).
\pagebreak{} \pagebreak{}