diff --git a/Source/Core/Core/Boot/Boot_BS2Emu.cpp b/Source/Core/Core/Boot/Boot_BS2Emu.cpp
index 3297de0d7a..4509671f83 100644
--- a/Source/Core/Core/Boot/Boot_BS2Emu.cpp
+++ b/Source/Core/Core/Boot/Boot_BS2Emu.cpp
@@ -40,8 +40,15 @@ bool CBoot::EmulatedBS2_GC()
 {
 	INFO_LOG(BOOT, "Faking GC BS2...");
 
+	// Set up MSR and the BAT SPR registers.
 	UReg_MSR& m_MSR = ((UReg_MSR&)PowerPC::ppcState.msr);
 	m_MSR.FP = 1;
+	PowerPC::ppcState.spr[SPR_IBAT0U] = 0x800001ff;
+	PowerPC::ppcState.spr[SPR_IBAT0L] = 0x00000002;
+	PowerPC::ppcState.spr[SPR_DBAT0U] = 0x800001ff;
+	PowerPC::ppcState.spr[SPR_DBAT0L] = 0x00000002;
+	PowerPC::ppcState.spr[SPR_DBAT1U] = 0xc0001fff;
+	PowerPC::ppcState.spr[SPR_DBAT1L] = 0x0000002a;
 
 	// Clear ALL memory
 	Memory::Clear();
@@ -317,8 +324,21 @@ bool CBoot::EmulatedBS2_Wii()
 	bool apploaderRan = false;
 	if (VolumeHandler::IsValid() && VolumeHandler::IsWii())
 	{
+		// Set up MSR and the BAT SPR registers.
 		UReg_MSR& m_MSR = ((UReg_MSR&)PowerPC::ppcState.msr);
 		m_MSR.FP = 1;
+		PowerPC::ppcState.spr[SPR_IBAT0U] = 0x800001ff;
+		PowerPC::ppcState.spr[SPR_IBAT0L] = 0x00000002;
+		PowerPC::ppcState.spr[SPR_IBAT4L] = 0x90001fff;
+		PowerPC::ppcState.spr[SPR_IBAT4L] = 0x10000002;
+		PowerPC::ppcState.spr[SPR_DBAT0U] = 0x800001ff;
+		PowerPC::ppcState.spr[SPR_DBAT0L] = 0x00000002;
+		PowerPC::ppcState.spr[SPR_DBAT1U] = 0xc0001fff;
+		PowerPC::ppcState.spr[SPR_DBAT1L] = 0x0000002a;
+		PowerPC::ppcState.spr[SPR_DBAT4U] = 0x90001fff;
+		PowerPC::ppcState.spr[SPR_DBAT4L] = 0x10000002;
+		PowerPC::ppcState.spr[SPR_DBAT5U] = 0xd0001fff;
+		PowerPC::ppcState.spr[SPR_DBAT5L] = 0x1000002a;
 
 		Memory::Write_U32(0x4c000064, 0x80000300); // Write default DFI Handler:     rfi
 		Memory::Write_U32(0x4c000064, 0x80000800); // Write default FPU Handler:     rfi
diff --git a/Source/Core/Core/PowerPC/Gekko.h b/Source/Core/Core/PowerPC/Gekko.h
index a100c97c97..dc1d165583 100644
--- a/Source/Core/Core/PowerPC/Gekko.h
+++ b/Source/Core/Core/PowerPC/Gekko.h
@@ -749,6 +749,22 @@ enum
 	SPR_DBAT2L  = 541,
 	SPR_DBAT3U  = 542,
 	SPR_DBAT3L  = 543,
+	SPR_IBAT4U  = 560,
+	SPR_IBAT4L  = 561,
+	SPR_IBAT5U  = 562,
+	SPR_IBAT5L  = 563,
+	SPR_IBAT6U  = 564,
+	SPR_IBAT6L  = 565,
+	SPR_IBAT7U  = 566,
+	SPR_IBAT7L  = 567,
+	SPR_DBAT4U  = 568,
+	SPR_DBAT4L  = 569,
+	SPR_DBAT5U  = 570,
+	SPR_DBAT5L  = 571,
+	SPR_DBAT6U  = 572,
+	SPR_DBAT6L  = 573,
+	SPR_DBAT7U  = 574,
+	SPR_DBAT7L  = 575,
 	SPR_GQR0  = 912,
 	SPR_HID0  = 1008,
 	SPR_HID1  = 1009,