diff --git a/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp b/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp
index 9516d15645..cd5a2e499c 100644
--- a/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp
+++ b/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp
@@ -120,32 +120,38 @@ bool CEXIETHERNET::resume() {
 	DEBUGPRINT("BBA resume complete\n");
 	return true;
 }
+THREAD_RETURN CpuThread(void *pArg)
+{
+	CEXIETHERNET* self = (CEXIETHERNET*)pArg;
+	while(1)
+	{
+		if(self->CheckRecieved())
+		{
+			u8 B[1514];
+			if((self->mRecvBufferLength = read(fd, B, 1500)) > 0)
+			{
+				//mRecvBuffer.write(B, BytesRead);
+				//strncat(mRecvBuffer.p(), B, BytesRead);
+				memcpy(self->mRecvBuffer, B, self->mRecvBufferLength);
+			}
+			self->handleRecvdPacket();
+			self->mWaiting = false;
+			return 0;
+		}
+		sleep(1);
+	}
+	return 0;
+}
 bool CEXIETHERNET::startRecv() {
 	DEBUGPRINT("Start Receive!\n");
 	//exit(0);
-	if(!isActivated())
-		return false;// Should actually be an assert
-	if(!CheckRecieved())
-		return false;
-	DEBUGPRINT("startRecv... ");
+		DEBUGPRINT("startRecv... ");
 	if(mWaiting) {
 		DEBUGPRINT("already waiting\n");
 		return true;
 	}
-	u8 B[1514];
-	if((mRecvBufferLength = read(fd, B, 1500)) > 0)
-	{
-		//mRecvBuffer.write(B, BytesRead);
-		//strncat(mRecvBuffer.p(), B, BytesRead);
-		memcpy(mRecvBuffer, B, mRecvBufferLength);
-	}
-	DEBUGPRINT("Read %d bytes\n", mRecvBufferLength);
-			if(hasDHCP && mRecvBufferLength == 342)
-			{
-				DEBUGPRINT("DHCP offer packet\n");
-				//exit(0);
-			}
-	handleRecvdPacket();
+	
+	Common::Thread *cpuThread = new Common::Thread(CpuThread, (void*)this);
 	return true; 
 }
 bool CEXIETHERNET::sendPacket(u8 *etherpckt, int size) 
@@ -201,11 +207,11 @@ bool CEXIETHERNET::handleRecvdPacket()
 	//mPacketsRcvd++;
 	mRecvBufferLength = 0;
 
-	if(mBbaMem[0x08] & BBA_INTERRUPT_RECV) 
+	if(mBbaMem[BBA_IMR] & BBA_INTERRUPT_RECV) 
 	{
-		if(!(mBbaMem[0x09] & BBA_INTERRUPT_RECV)) 
+		if(!(mBbaMem[BBA_IR] & BBA_INTERRUPT_RECV)) 
 		{
-			mBbaMem[0x09] |= BBA_INTERRUPT_RECV;
+			mBbaMem[BBA_IR] |= BBA_INTERRUPT_RECV;
 			DEBUGPRINT("BBA Recv interrupt raised\n");
 			m_bInterruptSet = true;
 		}
diff --git a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp
index 51bcbebeb3..7e8e586000 100644
--- a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp
+++ b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp
@@ -23,8 +23,8 @@
 #include "EXI_Device.h"
 #include "EXI_DeviceEthernet.h"
 
-//#define SONICDEBUG
-//#define FILEDEBUG
+#define SONICDEBUG
+#define FILEDEBUG
 #ifdef FILEDEBUG
 FILE *ME = 0;
 #endif
@@ -126,6 +126,8 @@ void CEXIETHERNET::SetCS(int cs)
 		mExpectSpecialImmRead = false;
 		mWriteP = mReadP = INVALID_P;
 		m_bInterruptSet = false;
+		//mBbaMem[BBA_IR] = 0;
+		//mBbaMem[BBA_IRM] = 0;
 	}
 }
 
@@ -225,8 +227,7 @@ void CEXIETHERNET::ImmWrite(u32 _uData,  u32 _uSize)
 					DEBUGPRINT( "\t\t[INFO]BBA Start Recieve\n");
 					//exit(0);
 					// TODO: Need to make our virtual network device start receiving
-					if(CheckRecieved())
-						startRecv();
+					startRecv();
 				}
 				if (RISE(BBA_NCRA_ST1)) 
 				{
@@ -405,6 +406,24 @@ void CEXIETHERNET::ImmWrite(u32 _uData,  u32 _uSize)
 			//DEBUGPRINT( "\t\t[INFO]mBbaMem[0x%x] = 0x80;! Now %x\n", mReadP, mBbaMem[mReadP]);
 			//exit(0);
 			break;
+		case 0x0e:
+		case 0x0f: // TWP - Transmit Buffer Write Page Pointer Register
+			break;
+		case 0x5b: // ??
+		case 0x5c: // These two go together
+			break;
+		case 0x31: // NWAYS - NWAY Status Register
+		case 0x09: // IR
+		case 0x08: // IRM
+		case 0x100: // Input Queue?
+		case 0x110: // ?? Not even in YAGCD
+		case 0x04: // LTPS - Last Transmitted Packet Status (transmit error code ?)
+		case 0x30: // NWAYC - NWAY Configuration Register
+			break;
+		default:
+			printf("Read from 0x%02x\n", mReadP);
+			//exit(0);
+			break;
 		}
 		//DEBUGPRINT("BBA Read pointer set to 0x%0*X, Data: 0x%08X\n", _uSize, mReadP, _uData);
 		return;
@@ -485,8 +504,7 @@ void CEXIETHERNET::DMARead(u32 _uAddr, u32 _uSize)
 		DEBUGPRINT("DMA Read from BBA address 0x%0*X, %i bytes\n",
 			mReadP >= CB_OFFSET ? 4 : 2, mReadP, _uSize);
 		//exit(0);
-		mReadP = mReadP + (u16)_uSize;
-		exit(0);
+		mReadP = mReadP + _uSize;
 		return;
 	} 
 	else 
diff --git a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h
index a8726fd4aa..91500168a2 100644
--- a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h
+++ b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h
@@ -17,6 +17,7 @@
 
 #ifndef _EXIDEVICE_ETHERNET_H
 #define _EXIDEVICE_ETHERNET_H
+#include "Thread.h"
 
 inline u8 makemaskb(int start, int end) {
 	return (u8)_rotl((2 << (end - start)) - 1, 7 - end);
@@ -192,7 +193,7 @@ public:
 	void DMAWrite(u32 _uAddr, u32 _uSize);
 	void DMARead(u32 _uAddr, u32 _uSize);
 
-private:
+//private:
 	// STATE_TO_SAVE
 	u32 m_uPosition;
 	u32 m_uCommand;
@@ -236,6 +237,7 @@ private:
 	bool resume();
 	bool startRecv();
 	bool cbwriteDescriptor(u32 size);
+
 	
 	volatile bool mWaiting;
 	Container<u8> mRecvBuffer;