ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

JitIL: Attempt to fix some 64-bit build errors. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2204 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
magumagu9 2009-02-10 12:44:17 +00:00
parent 3e9b3b266a
commit 318d1105fb
2 changed files with 11 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp
View File

@ -1010,8 +1010,13 @@ static OpArg regBuildMemAddress(RegInfo& RI, InstLoc I, InstLoc AI,
baseReg = regEnsureInReg(RI, AddrBase); baseReg = regEnsureInReg(RI, AddrBase);
} }
if (Profiled) { if (Profiled) {
return MDisp(baseReg, (u32)Memory::base + offset + ProfileOffset); #ifdef _M_IX86
return MDisp(baseReg, (u32)Memory::base + offset + ProfileOffset);
#else
// FIXME: TO IMPLEMENT (Profiled mode isn't the default,
// at least for the moment)
#endif
} }
return MDisp(baseReg, offset); return MDisp(baseReg, offset);
} }

8
Source/Core/Core/Src/PowerPC/Jit64IL/JitAsm.cpp
View File

@ -254,7 +254,7 @@ void AsmRoutineManager::GenQuantizedStores() {
const u8* storePairedU8 = AlignCode4(); const u8* storePairedU8 = AlignCode4();
SHR(32, R(EAX), Imm8(6)); SHR(32, R(EAX), Imm8(6));
MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS)); MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
PUNPCKLDQ(XMM1, R(XMM1)); PUNPCKLDQ(XMM1, R(XMM1));
MULPS(XMM0, R(XMM1)); MULPS(XMM0, R(XMM1));
CVTPS2DQ(XMM0, R(XMM0)); CVTPS2DQ(XMM0, R(XMM0));
@ -271,7 +271,7 @@ void AsmRoutineManager::GenQuantizedStores() {
const u8* storePairedS8 = AlignCode4(); const u8* storePairedS8 = AlignCode4();
SHR(32, R(EAX), Imm8(6)); SHR(32, R(EAX), Imm8(6));
MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS)); MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
PUNPCKLDQ(XMM1, R(XMM1)); PUNPCKLDQ(XMM1, R(XMM1));
MULPS(XMM0, R(XMM1)); MULPS(XMM0, R(XMM1));
CVTPS2DQ(XMM0, R(XMM0)); CVTPS2DQ(XMM0, R(XMM0));
@ -288,7 +288,7 @@ void AsmRoutineManager::GenQuantizedStores() {
const u8* storePairedU16 = AlignCode4(); const u8* storePairedU16 = AlignCode4();
SHR(32, R(EAX), Imm8(6)); SHR(32, R(EAX), Imm8(6));
MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS)); MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
PUNPCKLDQ(XMM1, R(XMM1)); PUNPCKLDQ(XMM1, R(XMM1));
MULPS(XMM0, R(XMM1)); MULPS(XMM0, R(XMM1));
CVTPS2DQ(XMM0, R(XMM0)); CVTPS2DQ(XMM0, R(XMM0));
@ -309,7 +309,7 @@ void AsmRoutineManager::GenQuantizedStores() {
const u8* storePairedS16 = AlignCode4(); const u8* storePairedS16 = AlignCode4();
SHR(32, R(EAX), Imm8(6)); SHR(32, R(EAX), Imm8(6));
MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS)); MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
PUNPCKLDQ(XMM1, R(XMM1)); PUNPCKLDQ(XMM1, R(XMM1));
MULPS(XMM0, R(XMM1)); MULPS(XMM0, R(XMM1));
CVTPS2DQ(XMM0, R(XMM0)); CVTPS2DQ(XMM0, R(XMM0));