From 30eff8e37c05e44e2a5c4d2b53de3348c00df3ee Mon Sep 17 00:00:00 2001
From: JosJuice <josjuice@gmail.com>
Date: Sat, 25 May 2024 18:13:38 +0200
Subject: [PATCH] PPCAnalyst: Fix handling of FL_READ_CR_BI

BI contains both the field and the flag (5 bits total), so we need to
shift away the 2 flag bits to get the 3 field bits. (Same as the
CRBA/CRBB handling in the code just below the BI code.)
---
 Source/Core/Core/PowerPC/PPCAnalyst.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Source/Core/Core/PowerPC/PPCAnalyst.cpp b/Source/Core/Core/PowerPC/PPCAnalyst.cpp
index a0addb56c6..917b0b27eb 100644
--- a/Source/Core/Core/PowerPC/PPCAnalyst.cpp
+++ b/Source/Core/Core/PowerPC/PPCAnalyst.cpp
@@ -590,7 +590,7 @@ void PPCAnalyzer::SetInstructionStats(CodeBlock* block, CodeOp* code,
   }
   else if (opinfo->flags & FL_READ_CR_BI)
   {
-    code->crIn[code->inst.BI] = true;
+    code->crIn[code->inst.BI >> 2] = true;
   }
   else if (opinfo->type == OpType::CR)
   {