From 2f8a147eda29297e7166962f8b5eea71a87787ad Mon Sep 17 00:00:00 2001
From: magumagu <magumagu9@gmail.com>
Date: Thu, 22 May 2014 01:06:30 -0700
Subject: [PATCH] Interpreter: make fres match hardware.

New table-based implementation written based on actual hardware behavior.
(hwtest coming soon).
---
 .../PowerPC/Interpreter/Interpreter_FPUtils.h | 58 +++++++++++++++++++
 .../Interpreter/Interpreter_FloatingPoint.cpp | 14 +----
 .../Interpreter/Interpreter_Paired.cpp        | 18 +-----
 3 files changed, 61 insertions(+), 29 deletions(-)

diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h
index 5131e526b3..3971999fa8 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h
@@ -271,3 +271,61 @@ inline u64 ConvertToDouble(u32 _x)
 		return ((x & 0xc0000000) << 32) | z | ((x & 0x3fffffff) << 29);
 	}
 }
+
+// Used by fres and ps_res.
+inline double ApproximateReciprocal(double val)
+{
+	static const int expected_base[] = {
+		0x7ff800, 0x783800, 0x70ea00, 0x6a0800,
+		0x638800, 0x5d6200, 0x579000, 0x520800,
+		0x4cc800, 0x47ca00, 0x430800, 0x3e8000,
+		0x3a2c00, 0x360800, 0x321400, 0x2e4a00,
+		0x2aa800, 0x272c00, 0x23d600, 0x209e00,
+		0x1d8800, 0x1a9000, 0x17ae00, 0x14f800,
+		0x124400, 0x0fbe00, 0x0d3800, 0x0ade00,
+		0x088400, 0x065000, 0x041c00, 0x020c00,
+	};
+	static const int expected_dec[] = {
+		0x3e1, 0x3a7, 0x371, 0x340,
+		0x313, 0x2ea, 0x2c4, 0x2a0,
+		0x27f, 0x261, 0x245, 0x22a,
+		0x212, 0x1fb, 0x1e5, 0x1d1,
+		0x1be, 0x1ac, 0x19b, 0x18b,
+		0x17c, 0x16e, 0x15b, 0x15b,
+		0x143, 0x143, 0x12d, 0x12d,
+		0x11a, 0x11a, 0x108, 0x106,
+	};
+
+	union {
+		double valf;
+		long long vali;
+	};
+	valf = val;
+	long long mantissa = vali & ((1LL << 52) - 1);
+	long long sign = vali & (1ULL << 63);
+	long long exponent = vali & (0x7FFLL << 52);
+
+	// Special case 0
+	if (mantissa == 0 && exponent == 0)
+		return sign ? -INFINITY : INFINITY;
+	// Special case NaN-ish numbers
+	if (exponent == (0x7FFLL << 52))
+	{
+		if (mantissa == 0)
+			return sign ? -0.0 : 0.0;
+		return 0.0 + valf;
+	}
+	// Special case small inputs
+	if (exponent < (895LL << 52))
+		return sign ? -FLT_MAX : FLT_MAX;
+	// Special case large inputs
+	if (exponent >= (1149LL << 52))
+		return sign ? -0.0f : 0.0f;
+
+	exponent = (0x7FDLL << 52) - exponent;
+
+	int i = (int)(mantissa >> 37);
+	vali = sign | exponent;
+	vali |= (long long)(expected_base[i / 1024] - (expected_dec[i / 1024] * (i % 1024) + 1) / 2) << 29;
+	return valf;
+}
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp
index fbdaf7646a..980e0e7078 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp
@@ -388,19 +388,7 @@ void Interpreter::fdivsx(UGeckoInstruction _inst)
 void Interpreter::fresx(UGeckoInstruction _inst)
 {
 	double b = rPS0(_inst.FB);
-	double one_over = ForceSingle(1.0 / b);
-	// this is based on the real hardware tests
-	if (b != 0.0 && IsINF(one_over))
-	{
-		if (one_over > 0)
-			riPS0(_inst.FD) = riPS1(_inst.FD) = MAX_SINGLE;
-		else
-			riPS0(_inst.FD) = riPS1(_inst.FD) = MIN_SINGLE;
-	}
-	else
-	{
-		rPS0(_inst.FD) = rPS1(_inst.FD) = one_over;
-	}
+	rPS0(_inst.FD) = rPS1(_inst.FD) = ApproximateReciprocal(b);
 	if (b == 0.0)
 	{
 		SetFPException(FPSCR_ZX);
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_Paired.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_Paired.cpp
index 387d46ea96..babf80db09 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_Paired.cpp
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_Paired.cpp
@@ -178,22 +178,8 @@ void Interpreter::ps_res(UGeckoInstruction _inst)
 	{
 		SetFPException(FPSCR_ZX);
 	}
-	rPS0(_inst.FD) = ForceSingle(1.0 / a);
-	if (a != 0.0 && IsINF(rPS0(_inst.FD)))
-	{
-		if (rPS0(_inst.FD) > 0)
-			riPS0(_inst.FD) = MAX_SINGLE; // largest finite single
-		else
-			riPS0(_inst.FD) = MIN_SINGLE; // most negative finite single
-	}
-	rPS1(_inst.FD) = ForceSingle(1.0 / b);
-	if (b != 0.0 && IsINF(rPS1(_inst.FD)))
-	{
-		if (rPS1(_inst.FD) > 0)
-			riPS1(_inst.FD) = MAX_SINGLE;
-		else
-			riPS1(_inst.FD) = MIN_SINGLE;
-	}
+	rPS0(_inst.FD) = ApproximateReciprocal(a);
+	rPS1(_inst.FD) = ApproximateReciprocal(b);
 	UpdateFPRF(rPS0(_inst.FD));
 	if (_inst.Rc) Helper_UpdateCR1();
 }