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Merge pull request #2524 from lioncash/aarch64 

Arm64: Make some functions const.
This commit is contained in:
flacs 2015-06-05 04:52:14 +02:00
parent 97382ec90a fe77505d4d
commit 2f2e514b54
4 changed files with 12 additions and 12 deletions
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2
Source/Core/Common/Arm64Emitter.h
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@ -276,7 +276,7 @@ public:
{ {
return m_type; return m_type;
} }
ARM64Reg GetReg() ARM64Reg GetReg() const
{ {
return m_destReg; return m_destReg;
} }

2
Source/Core/Common/CodeBlock.h
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@ -51,7 +51,7 @@ public:
region_size = 0; region_size = 0;
} }
bool IsInSpace(u8 *ptr) bool IsInSpace(u8 *ptr) const
{ {
return (ptr >= region) && (ptr < (region + region_size)); return (ptr >= region) && (ptr < (region + region_size));
} }

2
Source/Core/Core/PowerPC/JitArm64/Jit.h
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@ -35,7 +35,7 @@ public:
JitBaseBlockCache *GetBlockCache() { return &blocks; } JitBaseBlockCache *GetBlockCache() { return &blocks; }
bool IsInCodeSpace(u8 *ptr) { return IsInSpace(ptr); } bool IsInCodeSpace(u8 *ptr) const { return IsInSpace(ptr); }
bool HandleFault(uintptr_t access_address, SContext* ctx) override; bool HandleFault(uintptr_t access_address, SContext* ctx) override;

18
Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
View File

@ -46,16 +46,16 @@ public:
{ {
} }
RegType GetType() RegType GetType() const
{ {
return m_type; return m_type;
} }
ARM64Reg GetReg() ARM64Reg GetReg() const
{ {
return m_reg; return m_reg;
} }
u32 GetImm() u32 GetImm() const
{ {
return m_value; return m_value;
} }
@ -81,12 +81,12 @@ public:
m_last_used = 0xFFFF; m_last_used = 0xFFFF;
} }
u32 GetLastUsed() { return m_last_used; } u32 GetLastUsed() const { return m_last_used; }
void ResetLastUsed() { m_last_used = 0; } void ResetLastUsed() { m_last_used = 0; }
void IncrementLastUsed() { ++m_last_used; } void IncrementLastUsed() { ++m_last_used; }
void SetDirty(bool dirty) { m_dirty = dirty; } void SetDirty(bool dirty) { m_dirty = dirty; }
bool IsDirty() { return m_dirty; } bool IsDirty() const { return m_dirty; }
private: private:
// For REG_REG // For REG_REG
@ -106,10 +106,10 @@ class HostReg
public: public:
HostReg() : m_reg(INVALID_REG), m_locked(false) {} HostReg() : m_reg(INVALID_REG), m_locked(false) {}
HostReg(ARM64Reg reg) : m_reg(reg), m_locked(false) {} HostReg(ARM64Reg reg) : m_reg(reg), m_locked(false) {}
bool IsLocked() { return m_locked; } bool IsLocked() const { return m_locked; }
void Lock() { m_locked = true; } void Lock() { m_locked = true; }
void Unlock() { m_locked = false; } void Unlock() { m_locked = false; }
ARM64Reg GetReg() { return m_reg; } ARM64Reg GetReg() const { return m_reg; }
bool operator==(const ARM64Reg& reg) bool operator==(const ARM64Reg& reg)
{ {
@ -233,10 +233,10 @@ public:
void SetImmediate(u32 preg, u32 imm); void SetImmediate(u32 preg, u32 imm);
// Returns if a register is set as an immediate // Returns if a register is set as an immediate
bool IsImm(u32 reg) { return m_guest_registers[reg].GetType() == REG_IMM; } bool IsImm(u32 reg) const { return m_guest_registers[reg].GetType() == REG_IMM; }
// Gets the immediate that a register is set to // Gets the immediate that a register is set to
u32 GetImm(u32 reg) { return m_guest_registers[reg].GetImm(); } u32 GetImm(u32 reg) const { return m_guest_registers[reg].GetImm(); }
void BindToRegister(u32 preg, bool do_load); void BindToRegister(u32 preg, bool do_load);