Merge pull request #10702 from Pokechu22/dsp-cmpaxh
DSP LLE: Rename CMPAR to CMPAXH
This commit is contained in:
Mai M
GitHub
commit
2d6fe6a89f
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@ -284,7 +284,7 @@ const std::array<DSPOPCTemplate, 230> s_opcodes =
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//c-d
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{"MULC", 0xc000, 0xe700, 1, 2, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $prod = $acS.m * $axS.h
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{"CMPAR", 0xc100, 0xe700, 1, 2, {{P_ACC, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 12, 0x1000}}, true, false, false, false, true}, // FLAGS($acS - axR.h)
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{"CMPAXH", 0xc100, 0xe700, 1, 2, {{P_ACC, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 12, 0x1000}}, true, false, false, false, true}, // FLAGS($acS - axR.h)
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{"MULCMVZ", 0xc200, 0xe600, 1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR.hm, $acR.l, $prod = $prod.hm, 0, $acS.m * $axS.h
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{"MULCAC", 0xc400, 0xe600, 1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR, $prod = $acR + $prod, $acS.m * $axS.h
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{"MULCMV", 0xc600, 0xe600, 1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR, $prod = $prod, $acS.m * $axS.h
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@ -124,12 +124,12 @@ void Interpreter::cmp(const UDSPInstruction)
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ZeroWriteBackLog();
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}
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// CMPAR $acS axR.h
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// CMPAXH $acS, $axR.h
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// 110r s001 xxxx xxxx
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// Compares accumulator $acS with accumulator $axR.h.
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// Compares accumulator $acS with high part of secondary accumulator $axR.h.
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//
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// flags out: x-xx xxxx
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void Interpreter::cmpar(const UDSPInstruction opc)
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void Interpreter::cmpaxh(const UDSPInstruction opc)
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{
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const u8 rreg = (opc >> 12) & 0x1;
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const u8 sreg = (opc >> 11) & 0x1;
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@ -178,7 +178,7 @@ constexpr std::array<InterpreterOpInfo, 125> s_opcodes
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// C-D
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{0xc000, 0xe700, &Interpreter::mulc},
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{0xc100, 0xe700, &Interpreter::cmpar},
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{0xc100, 0xe700, &Interpreter::cmpaxh},
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{0xc200, 0xe600, &Interpreter::mulcmvz},
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{0xc400, 0xe600, &Interpreter::mulcac},
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{0xc600, 0xe600, &Interpreter::mulcmv},
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@ -70,7 +70,7 @@ public:
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void clrl(UDSPInstruction opc);
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void clrp(UDSPInstruction opc);
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void cmp(UDSPInstruction opc);
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void cmpar(UDSPInstruction opc);
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void cmpaxh(UDSPInstruction opc);
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void cmpi(UDSPInstruction opc);
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void cmpis(UDSPInstruction opc);
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void dar(UDSPInstruction opc);
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@ -115,7 +115,7 @@ public:
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void tst(UDSPInstruction opc);
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void tstaxh(UDSPInstruction opc);
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void cmp(UDSPInstruction opc);
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void cmpar(UDSPInstruction opc);
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void cmpaxh(UDSPInstruction opc);
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void cmpi(UDSPInstruction opc);
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void cmpis(UDSPInstruction opc);
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void xorr(UDSPInstruction opc);
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@ -188,12 +188,12 @@ void DSPEmitter::cmp(const UDSPInstruction opc)
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}
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}
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// CMPAR $acS axR.h
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// CMPAXH $acS, $axR.h
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// 110r s001 xxxx xxxx
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// Compares accumulator $acS with accumulator $axR.h.
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// Compares accumulator $acS with high part of secondary accumulator $axR.h.
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//
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// flags out: x-xx xxxx
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void DSPEmitter::cmpar(const UDSPInstruction opc)
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void DSPEmitter::cmpaxh(const UDSPInstruction opc)
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{
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if (FlagsNeeded())
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{
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@ -178,7 +178,7 @@ const std::array<JITOpInfo, 125> s_opcodes =
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// C-D
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{0xc000, 0xe700, &DSPEmitter::mulc},
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{0xc100, 0xe700, &DSPEmitter::cmpar},
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{0xc100, 0xe700, &DSPEmitter::cmpaxh},
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{0xc200, 0xe600, &DSPEmitter::mulcmvz},
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{0xc400, 0xe600, &DSPEmitter::mulcac},
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{0xc600, 0xe600, &DSPEmitter::mulcmv},
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@ -0,0 +1,332 @@
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incdir "tests"
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include "dsp_base.inc"
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input_ax:
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; [0] - 0x0000'0000 - 0
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CW 0
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CW 0
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; [1] - 0x0000'0001 - 1 in $ax0.l
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CW 0
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CW 1
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; [2] - 0x0000'ffff - -1 in $ax0.l
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CW 0
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CW 0xffff
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; [3] - 0x0001'0000 - 1 in $ax0.h
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CW 1
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CW 0
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; [4] - 0x7fff'0000 - INT_MAX in $ax0.h
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CW 0x7fff
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CW 0
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; [5] - 0x8000'0000 - INT_MIN in $ax0.h
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CW 0x8000
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CW 0
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; [6] - 0xffff'0000 - -1 in $ax0.h
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CW 0xffff
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CW 0
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input_ax_end:
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input_acc:
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; [0] - 0x00'0000'0000 - 0
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CW 0
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CW 0
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CW 0
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; [1] - 0x00'0000'0001 - 1 in $ac0.l
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CW 0
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CW 0
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CW 1
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; [2] - 0x00'0000'ffff - -1 in $ac0.l
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CW 0
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CW 0
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CW 1
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; [3] - 0x00'0001'0000 - 1 in $ac0.m
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CW 0
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CW 1
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CW 0
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; [4] - 0x00'7fff'0000 - INT_MAX in $ac0.m
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CW 0
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CW 0x7fff
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CW 0
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; [5] - 0x00'8000'0000 - INT_MIN in $ac0.m, but not sign extended
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CW 0
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CW 0x8000
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CW 0
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; [6] - 0x00'ffff'0000 - -1 in $ac0.m, but not sign extended
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CW 0
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CW 0xffff
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CW 0
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; [7] - 0x01'0000'0000 - 1 in $ac0.l
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CW 1
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CW 0
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CW 0
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; [8] - 0x7f'ffff'0000 - true INT_MAX
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CW 0x7f
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CW 0xffff
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CW 0
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; [9] - 0x80'0000'0000 - true INT_MIN
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CW 0x80
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CW 0
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CW 0
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; [10] - 0xff'8000'0000 - INT_MIN in $ac0.m, sign-extended
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CW 0xff
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CW 0x8000
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CW 0
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; [11] - 0xff'ffff'0000 - -1
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CW 0xff
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CW 0xffff
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CW 0
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input_acc_end:
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/* Python script to generate the following result tables from a DSP dump:
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import struct
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def gen_tables(name, num_ax, num_acc):
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with open(name, "rb") as fin:
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data = fin.read()
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reg_values = list(struct.iter_unpack(">" + "H"*0x20, data))
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# Initial register values (there is no corresponding send_back call for these), then our two
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# default value checks, then the TSTAXH test, then the CMPAXH test, then the test results
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assert len(reg_values) == 1 + 2 + num_ax + num_ax * num_acc + 1
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print("result_table_tstaxh:")
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for ax in range(num_ax):
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# SR is register 0x13
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print("CW {:#04x}".format(reg_values[3 + ax][0x13]))
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print("result_table_tstaxh_end:")
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print()
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print("result_table_cmpaxh:")
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for ax in range(num_ax):
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print("; ax [{}]".format(ax))
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for acc in range(num_acc):
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print("CW {:#04x}".format(reg_values[3 + num_ax + ax * num_acc + acc][0x13]))
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print("result_table_cmpaxh_end:")
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gen_tables("dsp_dump0.bin", 7, 12)
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*/
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result_table_tstaxh:
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CW 0x22a4
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CW 0x22a4
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CW 0x22a4
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CW 0x22a0
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CW 0x2280
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CW 0x2288
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CW 0x22a8
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result_table_tstaxh_end:
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result_table_cmpaxh:
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; ax [0]
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CW 0x22a5
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CW 0x22a1
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CW 0x22a1
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CW 0x22a1
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CW 0x2281
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CW 0x2291
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CW 0x22b1
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CW 0x22b1
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CW 0x22b1
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CW 0x22b9
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CW 0x2289
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CW 0x22a9
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; ax [1]
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CW 0x22a5
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CW 0x22a1
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CW 0x22a1
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CW 0x22a1
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CW 0x2281
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CW 0x2291
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CW 0x22b1
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CW 0x22b1
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CW 0x22b1
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CW 0x22b9
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CW 0x2289
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CW 0x22a9
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; ax [2]
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CW 0x22a5
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CW 0x22a1
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CW 0x22a1
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CW 0x22a1
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CW 0x2281
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CW 0x2291
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CW 0x22b1
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CW 0x22b1
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CW 0x22b1
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CW 0x22b9
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CW 0x2289
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CW 0x22a9
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; ax [3]
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CW 0x22a8
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CW 0x22a8
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CW 0x22a8
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CW 0x22a5
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CW 0x2281
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CW 0x2281
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CW 0x22b1
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CW 0x22b1
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CW 0x22b1
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CW 0x22b3
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CW 0x2299
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CW 0x22a9
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; ax [4]
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CW 0x2288
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CW 0x2288
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CW 0x2288
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CW 0x2288
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CW 0x22a5
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CW 0x22a1
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CW 0x2291
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CW 0x2291
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CW 0x2291
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CW 0x2293
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CW 0x22b9
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CW 0x2289
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; ax [5]
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CW 0x2290
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CW 0x2290
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CW 0x2290
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CW 0x2290
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CW 0x22b0
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CW 0x22b0
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CW 0x2290
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CW 0x2290
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CW 0x229a
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CW 0x2298
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CW 0x22a5
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CW 0x2281
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; ax [6]
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CW 0x22a0
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CW 0x22a0
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CW 0x22a0
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CW 0x22a0
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CW 0x2290
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CW 0x2290
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CW 0x22b0
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CW 0x22b0
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CW 0x22ba
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CW 0x22b8
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CW 0x2288
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CW 0x22a5
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result_table_cmpaxh_end:
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test_main:
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; Perform one test using the default values
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; ($acc0 is 14 0009 0007 and $ax0 is 8000 0003, but this can be changed in the DSPSpy UI)
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; Also, as a sanity check, record the computed sizes of the result tables
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LRI $ar0, #input_ax
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LRI $ix0, #(input_ax_end - input_ax)
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LRI $ar1, #input_acc
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LRI $ix1, #(input_acc_end - input_acc)
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LRI $ar2, #result_table_tstaxh
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LRI $ix2, #(input_ax_end - input_ax)/2
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LRI $ar3, #result_table_cmpaxh
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LRI $ix3, #((input_ax_end - input_ax)/2)*((input_acc_end - input_acc)/3)
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; Set the sticky overflow bit just so that we get consistent $sr values
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; before and after an overflow occurs
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SBSET #1
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CMPAXH $acc0, $ax0.h
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CALL send_back ; Expected $sr: 2290
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; $ar0 should match $ix0, etc
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ADDARN $ar0, $ix0
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LRI $ix0, #input_ax_end
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ADDARN $ar1, $ix1
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LRI $ix1, #input_acc_end
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ADDARN $ar2, $ix2
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LRI $ix2, #result_table_tstaxh_end
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ADDARN $ar3, $ix3
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LRI $ix3, #result_table_cmpaxh_end
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TSTAXH $ax0.h
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CALL send_back ; Expected $sr: 2288
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CLR $acc0
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CLR $acc1
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LRI $ax0.h, #0
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LRI $ax0.l, #0
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LRI $ax1.h, #0
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LRI $ax1.l, #0
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; Check TSTAXH...
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LRI $ar0, #input_ax
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LRI $ar2, #result_table_tstaxh
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; for (int ctr = input_ax.size(); ctr > 0; ctr--) {
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BLOOPI #(input_ax_end - input_ax)/2, check_tstaxh_last_ins
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; Note: if DSPSpy supported populating DMEM as well as IMEM, then there are several
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; instructions that could make this faster and cleaner... but it doesn't currently,
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; so we're stuck with ILRRI.
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; Load the test value into $ax0.h/$ax0.l via $ac0.m
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ILRRI $ac0.m, $ar0 ; $ac0.m = IMEM[$ar0++]
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MRR $ax0.h, $ac0.m
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ILRRI $ac0.m, $ar0
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MRR $ax0.l, $ac0.m
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; Load the expected value into $ac1.m
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ILRRI $ac1.m, $ar2 ; $ac1.m = IMEM[$ar2++]
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; Reduce noise in the results
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LRI $ac0.m, #0
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; Do the test
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TSTAXH $ax0.h
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CALL send_back
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; Check if $sr matches the value we expected. If there is any difference,
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; note it via a nonzero $ax1.l. (send_back saves the value of $sr)
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MRR $ac0.m, $sr
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CMP
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IFNZ
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LRIS $ax1.l, #1
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check_tstaxh_last_ins:
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NOP
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; }
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; Check CMPAXH...
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CLR $acc0
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CLR $acc1
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LRI $ar0, #input_ax
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LRI $ar3, #result_table_cmpaxh
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; for (int ctr_ax = input_ax.size(); ctr_ax > 0; ctr_ax--) {
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BLOOPI #(input_ax_end - input_ax)/2, check_cmpaxh_last_ins_outer
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; Load the test value into $ax0.h/$ax0.l via $ac1.m
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ILRRI $ac1.m, $ar0
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MRR $ax0.h, $ac1.m
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ILRRI $ac1.m, $ar0
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MRR $ax0.l, $ac1.m
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LRI $ar1, #input_acc
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; for (int ctr_acc = input_acc.size(); ctr_acc > 0; ctr_acc--) {
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BLOOPI #(input_acc_end - input_acc)/3, check_cmpaxh_last_ins_inner
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; Load the test value into $ac0.h/$ac0.m/$ac0.l via $ac1.m
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ILRRI $ac1.m, $ar1
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MRR $ac0.h, $ac1.m
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ILRRI $ac0.m, $ar1 ; we can load it directly here
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ILRRI $ac1.m, $ar1
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MRR $ac0.l, $ac1.m
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; Load the expected value into $ac1.m
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ILRRI $ac1.m, $ar3
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; Do the test
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CMPAXH $acc0, $ax0.h
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CALL send_back
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; Check if $sr matches the value we expected. If there is any difference,
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; note it via a nonzero $ax1.h. (send_back saves the value of $sr)
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; We can overwrite $ac0.m here because we load it on the next iteration.
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MRR $ac0.m, $sr
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LRIS $ac0.l, #0
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LRI $ac0.h, #0
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CMP
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IFNZ
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LRIS $ax1.h, #1
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check_cmpaxh_last_ins_inner:
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NOP
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; }
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check_cmpaxh_last_ins_outer:
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NOP
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; }
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; We're done testing. In the final send_back call, if $ax1.l or $ax1.h
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; is nonzero, the test failed.
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CALL send_back
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; We're done, DO NOT DELETE THIS LINE
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JMP end_of_test
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@ -46,7 +46,7 @@
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% Document front page material
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\title{\textbf{\Huge GameCube DSP User's Manual}}
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\author{Reverse-engineered and documented by Duddie \\ \href{mailto:duddie@walla.com}{duddie@walla.com}}
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\date{\today\\v0.1.2}
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\date{\today\\v0.1.3}
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% Title formatting commands
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\newcommand{\OpcodeTitle}[1]{\subsection{#1}\label{instruction:#1}}
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@ -260,6 +260,7 @@ The purpose of this documentation is purely academic and it aims at understandin
|
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0.1.0 & 2021.08.21 & Pokechu22 & Added missing instructions, improved documentation of hardware registers, documented additional behaviors, and improved formatting. \\ \hline
|
||||
0.1.1 & 2022.05.14 & xperia64 & Added tested DSP bootloading transfer size \\ \hline
|
||||
0.1.2 & 2022.05.21 & Pokechu22 & Fixed ``ILLR'' typo in Instruction Memory section \\ \hline
|
||||
0.1.3 & 2022.05.27 & Pokechu22 & Renamed \texttt{CMPAR} instruction to \texttt{CMPAXH} \\ \hline
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
|
|
@ -1929,17 +1930,17 @@ A ``-'' indicates that the flag retains its previous value, a ``0'' indicates th
|
|||
\DSPOpcodeFlags{X}{-}{X}{X}{X}{X}{X}{X}
|
||||
\end{DSPOpcode}
|
||||
|
||||
\begin{DSPOpcode}{CMPAR}
|
||||
\begin{DSPOpcode}{CMPAXH}
|
||||
\begin{DSPOpcodeBytefield}{16}
|
||||
\monobitbox{4}{110r} & \monobitbox{4}{s001} & \monobitbox{4}{xxxx} & \monobitbox{4}{xxxx}
|
||||
\end{DSPOpcodeBytefield}
|
||||
|
||||
\begin{DSPOpcodeFormat}
|
||||
CMPAR $acS $axR.h
|
||||
CMPAXH $acS, $axR.h
|
||||
\end{DSPOpcodeFormat}
|
||||
|
||||
\begin{DSPOpcodeDescription}
|
||||
\item Compares accumulator \Register{\$acS} with accumulator \Register{\$axR.h}.
|
||||
\item Compares accumulator \Register{\$acS} with high part of secondary accumulator \Register{\$axR.h}.
|
||||
\end{DSPOpcodeDescription}
|
||||
|
||||
\begin{DSPOpcodeOperation}
|
||||
|
|
@ -5065,7 +5066,7 @@ Instruction & Opcode & Page \\ \hline
|
|||
\OpcodeRow{101s t11r xxxx xxxx}{MULXMV}
|
||||
\OpcodeRowSkip
|
||||
\OpcodeRow{110s t000 xxxx xxxx}{MULC}
|
||||
\OpcodeRow{110r s001 xxxx xxxx}{CMPAR}
|
||||
\OpcodeRow{110r s001 xxxx xxxx}{CMPAXH}
|
||||
\OpcodeRow{110s t01r xxxx xxxx}{MULCMVZ}
|
||||
\OpcodeRow{110s t10r xxxx xxxx}{MULCAC}
|
||||
\OpcodeRow{110s t11r xxxx xxxx}{MULCMV}
|
||||
|
|
|
|||
Loading…
Reference in New Issue