DSPLLE got rid of exception in progress hack.
I didn't get any change in behaviour though. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3621 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -157,11 +157,10 @@ void DSPCore_CheckExternalInterrupt()
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// check if there is an external interrupt
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if (g_dsp.cr & CR_EXTERNAL_INT)
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{
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if (dsp_SR_is_flag_set(FLAG_ENABLE_INTERUPT) && (g_dsp.exception_in_progress_hack == false))
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if (dsp_SR_is_flag_set(SR_INT_ENABLE))
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{
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// level 7 is the interrupt exception
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DSPCore_SetException(7);
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// level 7 is the interrupt exception. is it?
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// DSPCore_SetException(7);
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g_dsp.cr &= ~CR_EXTERNAL_INT;
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}
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}
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@ -170,21 +169,20 @@ void DSPCore_CheckExternalInterrupt()
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void DSPCore_CheckExceptions()
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{
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// check exceptions
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if ((g_dsp.exceptions != 0) && (!g_dsp.exception_in_progress_hack))
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if (g_dsp.exceptions != 0)
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{
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for (int i = 0; i < 8; i++)
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{
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if (g_dsp.exceptions & (1 << i))
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if (g_dsp.exceptions & (1 << i) && dsp_SR_is_flag_set(SR_INT_ENABLE))
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{
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_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
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dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
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dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);
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g_dsp.r[DSP_REG_SR] &= ~ SR_INT_ENABLE;
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g_dsp.pc = i * 2;
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g_dsp.exceptions &= ~(1 << i);
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g_dsp.exception_in_progress_hack = true;
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break;
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}
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}
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@ -75,6 +75,15 @@ void gdsp_mbox_write_h(u8 mbx, u16 val)
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gdsp_mbox[mbx][0] = val & 0x7fff;
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if (DSPHost_OnThread())
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g_CriticalSection.Leave();
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if (mbx == GDSP_MBOX_DSP)
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{
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DEBUG_LOG(DSPLLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
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} else {
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// mailbox
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DSPCore_SetException(7);
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}
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}
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@ -91,7 +100,8 @@ void gdsp_mbox_write_l(u8 mbx, u16 val)
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{
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DEBUG_LOG(DSPLLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
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} else {
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// Trigger exception?
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// mailbox
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DSPCore_SetException(7);
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}
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}
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@ -21,7 +21,6 @@
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#include "DSPTables.h"
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#define DSP_REG_MASK 0x1f
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#define FLAG_ENABLE_INTERUPT 11
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namespace DSPInterpreter {
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@ -48,8 +48,8 @@ void call(const UDSPInstruction& opc)
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// Generic callr implementation
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// CALLRcc $R
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// 0001 0111 rrr1 cccc
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// Call functionif condition cc has been met.Push program counter of
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// instruction following "call" tocall stack $st0. Set program counter to
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// Call function if condition cc has been met.Push program counter of
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// instruction following "call" to call stack $st0. Set program counter to
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// register $R.
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void callr(const UDSPInstruction& opc)
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{
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@ -121,13 +121,10 @@ void ret(const UDSPInstruction& opc)
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// Return from exception. Pops stored status register $sr from data stack
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// $st1 and program counter PC from call stack $st0 and sets $pc to this
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// location.
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// FIXME: is it also conditional? unknown opcodes 0x02fx
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void rti(const UDSPInstruction& opc)
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{
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g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D);
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g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
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g_dsp.exception_in_progress_hack = false;
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}
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// HALT
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