Merge pull request #9970 from JosJuice/jit64-fmaddxx-accurate-nan
Jit64: Fix fmaddXX with accurate NaNs
This commit is contained in:
commit
28ee0af9a3
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@ -126,7 +126,7 @@ public:
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bool duplicate = false);
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void FinalizeDoubleResult(Gen::X64Reg output, const Gen::OpArg& input);
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void HandleNaNs(UGeckoInstruction inst, Gen::X64Reg xmm_out, Gen::X64Reg xmm_in,
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Gen::X64Reg clobber = Gen::XMM0);
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Gen::X64Reg clobber);
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void MultiplyImmediate(u32 imm, int a, int d, bool overflow);
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@ -257,7 +257,7 @@ void Jit64::fp_arith(UGeckoInstruction inst)
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avx_op(avxOp, sseOp, dest, Rop1, Rop2, packed, reversible);
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}
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HandleNaNs(inst, Rd, dest);
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HandleNaNs(inst, Rd, dest, XMM0);
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if (single)
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FinalizeSingleResult(Rd, Rd, packed, true);
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else
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@ -345,7 +345,8 @@ void Jit64::fmaddXX(UGeckoInstruction inst)
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RegCache::Realize(Ra, Rb, Rc, Rd);
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}
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X64Reg result_reg = XMM0;
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X64Reg scratch_xmm = !use_fma && inst.SUBOP5 == 30 ? XMM1 : XMM0;
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X64Reg result_xmm = scratch_xmm == XMM0 ? XMM1 : XMM0;
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if (software_fma)
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{
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for (size_t i = (packed ? 1 : 0); i != std::numeric_limits<size_t>::max(); --i)
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@ -392,31 +393,35 @@ void Jit64::fmaddXX(UGeckoInstruction inst)
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if (packed)
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{
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MOVSD(Rd, XMM0);
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result_reg = Rd;
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result_xmm = Rd;
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}
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else
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{
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result_xmm = XMM0;
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}
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if (inst.SUBOP5 == 30 || inst.SUBOP5 == 31) // nmsub, nmadd
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XORPD(result_reg, MConst(packed ? psSignBits2 : psSignBits));
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XORPD(result_xmm, MConst(packed ? psSignBits2 : psSignBits));
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}
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else
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{
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switch (inst.SUBOP5)
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{
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case 14: // madds0
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MOVDDUP(XMM0, Rc);
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MOVDDUP(result_xmm, Rc);
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if (round_input)
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Force25BitPrecision(XMM0, R(XMM0), XMM1);
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Force25BitPrecision(result_xmm, R(result_xmm), scratch_xmm);
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break;
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case 15: // madds1
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avx_op(&XEmitter::VSHUFPD, &XEmitter::SHUFPD, XMM0, Rc, Rc, 3);
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avx_op(&XEmitter::VSHUFPD, &XEmitter::SHUFPD, result_xmm, Rc, Rc, 3);
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if (round_input)
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Force25BitPrecision(XMM0, R(XMM0), XMM1);
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Force25BitPrecision(result_xmm, R(result_xmm), scratch_xmm);
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break;
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default:
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if (single && round_input)
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Force25BitPrecision(XMM0, Rc, XMM1);
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Force25BitPrecision(result_xmm, Rc, scratch_xmm);
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else
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MOVAPD(XMM0, Rc);
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MOVAPD(result_xmm, Rc);
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break;
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}
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@ -426,17 +431,17 @@ void Jit64::fmaddXX(UGeckoInstruction inst)
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{
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case 28: // msub
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if (packed)
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VFMSUB132PD(XMM0, Rb.GetSimpleReg(), Ra);
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VFMSUB132PD(result_xmm, Rb.GetSimpleReg(), Ra);
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else
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VFMSUB132SD(XMM0, Rb.GetSimpleReg(), Ra);
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VFMSUB132SD(result_xmm, Rb.GetSimpleReg(), Ra);
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break;
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case 14: // madds0
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case 15: // madds1
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case 29: // madd
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if (packed)
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VFMADD132PD(XMM0, Rb.GetSimpleReg(), Ra);
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VFMADD132PD(result_xmm, Rb.GetSimpleReg(), Ra);
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else
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VFMADD132SD(XMM0, Rb.GetSimpleReg(), Ra);
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VFMADD132SD(result_xmm, Rb.GetSimpleReg(), Ra);
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break;
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// PowerPC and x86 define NMADD/NMSUB differently
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// x86: D = -A*C (+/-) B
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@ -444,15 +449,15 @@ void Jit64::fmaddXX(UGeckoInstruction inst)
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// so we have to swap them; the ADD/SUB here isn't a typo.
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case 30: // nmsub
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if (packed)
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VFNMADD132PD(XMM0, Rb.GetSimpleReg(), Ra);
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VFNMADD132PD(result_xmm, Rb.GetSimpleReg(), Ra);
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else
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VFNMADD132SD(XMM0, Rb.GetSimpleReg(), Ra);
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VFNMADD132SD(result_xmm, Rb.GetSimpleReg(), Ra);
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break;
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case 31: // nmadd
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if (packed)
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VFNMSUB132PD(XMM0, Rb.GetSimpleReg(), Ra);
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VFNMSUB132PD(result_xmm, Rb.GetSimpleReg(), Ra);
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else
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VFNMSUB132SD(XMM0, Rb.GetSimpleReg(), Ra);
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VFNMSUB132SD(result_xmm, Rb.GetSimpleReg(), Ra);
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break;
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}
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}
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@ -462,52 +467,59 @@ void Jit64::fmaddXX(UGeckoInstruction inst)
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{
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// We implement nmsub a little differently ((b - a*c) instead of -(a*c - b)),
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// so handle it separately.
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MOVAPD(XMM1, Rb);
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MOVAPD(scratch_xmm, Rb);
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if (packed)
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{
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MULPD(XMM0, Ra);
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SUBPD(XMM1, R(XMM0));
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MULPD(result_xmm, Ra);
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SUBPD(scratch_xmm, R(result_xmm));
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}
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else
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{
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MULSD(XMM0, Ra);
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SUBSD(XMM1, R(XMM0));
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MULSD(result_xmm, Ra);
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SUBSD(scratch_xmm, R(result_xmm));
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}
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result_reg = XMM1;
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result_xmm = scratch_xmm;
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}
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else
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{
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if (packed)
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{
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MULPD(XMM0, Ra);
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MULPD(result_xmm, Ra);
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if (inst.SUBOP5 == 28) // msub
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SUBPD(XMM0, Rb);
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SUBPD(result_xmm, Rb);
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else //(n)madd(s[01])
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ADDPD(XMM0, Rb);
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ADDPD(result_xmm, Rb);
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}
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else
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{
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MULSD(XMM0, Ra);
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MULSD(result_xmm, Ra);
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if (inst.SUBOP5 == 28)
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SUBSD(XMM0, Rb);
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SUBSD(result_xmm, Rb);
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else
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ADDSD(XMM0, Rb);
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ADDSD(result_xmm, Rb);
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}
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if (inst.SUBOP5 == 31) // nmadd
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XORPD(XMM0, MConst(packed ? psSignBits2 : psSignBits));
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XORPD(result_xmm, MConst(packed ? psSignBits2 : psSignBits));
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}
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}
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}
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if (SConfig::GetInstance().bAccurateNaNs && result_xmm == XMM0)
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{
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// HandleNaNs needs to clobber XMM0
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MOVAPD(XMM1, R(result_xmm));
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result_xmm = XMM1;
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}
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if (single)
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{
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HandleNaNs(inst, result_reg, result_reg, result_reg == XMM1 ? XMM0 : XMM1);
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FinalizeSingleResult(Rd, R(result_reg), packed, true);
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HandleNaNs(inst, result_xmm, result_xmm, XMM0);
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FinalizeSingleResult(Rd, R(result_xmm), packed, true);
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}
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else
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{
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HandleNaNs(inst, result_reg, result_reg, XMM1);
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FinalizeDoubleResult(Rd, R(result_reg));
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HandleNaNs(inst, result_xmm, result_xmm, XMM0);
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FinalizeDoubleResult(Rd, R(result_xmm));
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}
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}
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@ -109,7 +109,7 @@ void Jit64::ps_muls(UGeckoInstruction inst)
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if (round_input)
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Force25BitPrecision(XMM1, R(XMM1), XMM0);
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MULPD(XMM1, Ra);
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HandleNaNs(inst, Rd, XMM1);
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HandleNaNs(inst, Rd, XMM1, XMM0);
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FinalizeSingleResult(Rd, Rd);
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}
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