PowerPC: Remove rGPR macro.
This commit is contained in:
Admiral H. Curtiss
parent
8fccefa3aa
commit
27ce432012
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@ -349,8 +349,9 @@ void Interpreter::unknown_instruction(UGeckoInstruction inst)
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inst.hex, PowerPC::ppcState.pc, last_pc, LR);
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for (int i = 0; i < 32; i += 4)
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{
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NOTICE_LOG_FMT(POWERPC, "r{}: {:#010x} r{}: {:#010x} r{}: {:#010x} r{}: {:#010x}", i, rGPR[i],
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i + 1, rGPR[i + 1], i + 2, rGPR[i + 2], i + 3, rGPR[i + 3]);
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NOTICE_LOG_FMT(POWERPC, "r{}: {:#010x} r{}: {:#010x} r{}: {:#010x} r{}: {:#010x}", i,
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PowerPC::ppcState.gpr[i], i + 1, PowerPC::ppcState.gpr[i + 1], i + 2,
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PowerPC::ppcState.gpr[i + 2], i + 3, PowerPC::ppcState.gpr[i + 3]);
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}
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ASSERT_MSG(POWERPC, 0,
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"\nIntCPU: Unknown instruction {:08x} at PC = {:08x} last_PC = {:08x} LR = {:08x}\n",
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@ -29,44 +29,44 @@ u32 Interpreter::Helper_Carry(u32 value1, u32 value2)
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void Interpreter::addi(UGeckoInstruction inst)
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{
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if (inst.RA)
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rGPR[inst.RD] = rGPR[inst.RA] + u32(inst.SIMM_16);
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PowerPC::ppcState.gpr[inst.RD] = PowerPC::ppcState.gpr[inst.RA] + u32(inst.SIMM_16);
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else
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rGPR[inst.RD] = u32(inst.SIMM_16);
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PowerPC::ppcState.gpr[inst.RD] = u32(inst.SIMM_16);
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}
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void Interpreter::addic(UGeckoInstruction inst)
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{
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const u32 a = rGPR[inst.RA];
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const u32 a = PowerPC::ppcState.gpr[inst.RA];
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const u32 imm = u32(s32{inst.SIMM_16});
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rGPR[inst.RD] = a + imm;
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PowerPC::ppcState.gpr[inst.RD] = a + imm;
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PowerPC::SetCarry(Helper_Carry(a, imm));
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}
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void Interpreter::addic_rc(UGeckoInstruction inst)
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{
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addic(inst);
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Helper_UpdateCR0(rGPR[inst.RD]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RD]);
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}
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void Interpreter::addis(UGeckoInstruction inst)
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{
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if (inst.RA)
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rGPR[inst.RD] = rGPR[inst.RA] + u32(inst.SIMM_16 << 16);
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PowerPC::ppcState.gpr[inst.RD] = PowerPC::ppcState.gpr[inst.RA] + u32(inst.SIMM_16 << 16);
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else
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rGPR[inst.RD] = u32(inst.SIMM_16 << 16);
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PowerPC::ppcState.gpr[inst.RD] = u32(inst.SIMM_16 << 16);
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}
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void Interpreter::andi_rc(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] & inst.UIMM;
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Helper_UpdateCR0(rGPR[inst.RA]);
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] & inst.UIMM;
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::andis_rc(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] & (u32{inst.UIMM} << 16);
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Helper_UpdateCR0(rGPR[inst.RA]);
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] & (u32{inst.UIMM} << 16);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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template <typename T>
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@ -89,43 +89,44 @@ void Interpreter::Helper_IntCompare(UGeckoInstruction inst, T a, T b)
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void Interpreter::cmpi(UGeckoInstruction inst)
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{
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const s32 a = static_cast<s32>(rGPR[inst.RA]);
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const s32 a = static_cast<s32>(PowerPC::ppcState.gpr[inst.RA]);
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const s32 b = inst.SIMM_16;
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Helper_IntCompare(inst, a, b);
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}
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void Interpreter::cmpli(UGeckoInstruction inst)
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{
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const u32 a = rGPR[inst.RA];
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const u32 a = PowerPC::ppcState.gpr[inst.RA];
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const u32 b = inst.UIMM;
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Helper_IntCompare(inst, a, b);
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}
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void Interpreter::mulli(UGeckoInstruction inst)
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{
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rGPR[inst.RD] = u32(s32(rGPR[inst.RA]) * inst.SIMM_16);
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PowerPC::ppcState.gpr[inst.RD] = u32(s32(PowerPC::ppcState.gpr[inst.RA]) * inst.SIMM_16);
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}
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void Interpreter::ori(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] | inst.UIMM;
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] | inst.UIMM;
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}
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void Interpreter::oris(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] | (u32{inst.UIMM} << 16);
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] | (u32{inst.UIMM} << 16);
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}
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void Interpreter::subfic(UGeckoInstruction inst)
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{
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const s32 immediate = inst.SIMM_16;
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rGPR[inst.RD] = u32(immediate - s32(rGPR[inst.RA]));
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PowerPC::SetCarry((rGPR[inst.RA] == 0) || (Helper_Carry(0 - rGPR[inst.RA], u32(immediate))));
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PowerPC::ppcState.gpr[inst.RD] = u32(immediate - s32(PowerPC::ppcState.gpr[inst.RA]));
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PowerPC::SetCarry((PowerPC::ppcState.gpr[inst.RA] == 0) ||
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(Helper_Carry(0 - PowerPC::ppcState.gpr[inst.RA], u32(immediate))));
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}
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void Interpreter::twi(UGeckoInstruction inst)
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{
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const s32 a = s32(rGPR[inst.RA]);
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const s32 a = s32(PowerPC::ppcState.gpr[inst.RA]);
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const s32 b = inst.SIMM_16;
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const u32 TO = inst.TO;
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@ -142,199 +143,207 @@ void Interpreter::twi(UGeckoInstruction inst)
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void Interpreter::xori(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] ^ inst.UIMM;
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] ^ inst.UIMM;
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}
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void Interpreter::xoris(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] ^ (u32{inst.UIMM} << 16);
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] ^ (u32{inst.UIMM} << 16);
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}
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void Interpreter::rlwimix(UGeckoInstruction inst)
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{
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const u32 mask = MakeRotationMask(inst.MB, inst.ME);
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rGPR[inst.RA] = (rGPR[inst.RA] & ~mask) | (std::rotl(rGPR[inst.RS], inst.SH) & mask);
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PowerPC::ppcState.gpr[inst.RA] = (PowerPC::ppcState.gpr[inst.RA] & ~mask) |
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(std::rotl(PowerPC::ppcState.gpr[inst.RS], inst.SH) & mask);
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::rlwinmx(UGeckoInstruction inst)
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{
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const u32 mask = MakeRotationMask(inst.MB, inst.ME);
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rGPR[inst.RA] = std::rotl(rGPR[inst.RS], inst.SH) & mask;
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PowerPC::ppcState.gpr[inst.RA] = std::rotl(PowerPC::ppcState.gpr[inst.RS], inst.SH) & mask;
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::rlwnmx(UGeckoInstruction inst)
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{
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const u32 mask = MakeRotationMask(inst.MB, inst.ME);
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rGPR[inst.RA] = std::rotl(rGPR[inst.RS], rGPR[inst.RB] & 0x1F) & mask;
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PowerPC::ppcState.gpr[inst.RA] =
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std::rotl(PowerPC::ppcState.gpr[inst.RS], PowerPC::ppcState.gpr[inst.RB] & 0x1F) & mask;
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::andx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] & rGPR[inst.RB];
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] & PowerPC::ppcState.gpr[inst.RB];
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::andcx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] & ~rGPR[inst.RB];
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] & ~PowerPC::ppcState.gpr[inst.RB];
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::cmp(UGeckoInstruction inst)
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{
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const s32 a = static_cast<s32>(rGPR[inst.RA]);
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const s32 b = static_cast<s32>(rGPR[inst.RB]);
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const s32 a = static_cast<s32>(PowerPC::ppcState.gpr[inst.RA]);
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const s32 b = static_cast<s32>(PowerPC::ppcState.gpr[inst.RB]);
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Helper_IntCompare(inst, a, b);
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}
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void Interpreter::cmpl(UGeckoInstruction inst)
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{
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const u32 a = rGPR[inst.RA];
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const u32 b = rGPR[inst.RB];
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const u32 a = PowerPC::ppcState.gpr[inst.RA];
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const u32 b = PowerPC::ppcState.gpr[inst.RB];
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Helper_IntCompare(inst, a, b);
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}
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void Interpreter::cntlzwx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = u32(std::countl_zero(rGPR[inst.RS]));
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PowerPC::ppcState.gpr[inst.RA] = u32(std::countl_zero(PowerPC::ppcState.gpr[inst.RS]));
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::eqvx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = ~(rGPR[inst.RS] ^ rGPR[inst.RB]);
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PowerPC::ppcState.gpr[inst.RA] =
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~(PowerPC::ppcState.gpr[inst.RS] ^ PowerPC::ppcState.gpr[inst.RB]);
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::extsbx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = u32(s32(s8(rGPR[inst.RS])));
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PowerPC::ppcState.gpr[inst.RA] = u32(s32(s8(PowerPC::ppcState.gpr[inst.RS])));
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::extshx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = u32(s32(s16(rGPR[inst.RS])));
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PowerPC::ppcState.gpr[inst.RA] = u32(s32(s16(PowerPC::ppcState.gpr[inst.RS])));
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::nandx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = ~(rGPR[inst.RS] & rGPR[inst.RB]);
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PowerPC::ppcState.gpr[inst.RA] =
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~(PowerPC::ppcState.gpr[inst.RS] & PowerPC::ppcState.gpr[inst.RB]);
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::norx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = ~(rGPR[inst.RS] | rGPR[inst.RB]);
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PowerPC::ppcState.gpr[inst.RA] =
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~(PowerPC::ppcState.gpr[inst.RS] | PowerPC::ppcState.gpr[inst.RB]);
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::orx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] | rGPR[inst.RB];
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PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] | PowerPC::ppcState.gpr[inst.RB];
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::orcx(UGeckoInstruction inst)
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{
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rGPR[inst.RA] = rGPR[inst.RS] | (~rGPR[inst.RB]);
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PowerPC::ppcState.gpr[inst.RA] =
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PowerPC::ppcState.gpr[inst.RS] | (~PowerPC::ppcState.gpr[inst.RB]);
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::slwx(UGeckoInstruction inst)
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{
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const u32 amount = rGPR[inst.RB];
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rGPR[inst.RA] = (amount & 0x20) != 0 ? 0 : rGPR[inst.RS] << (amount & 0x1f);
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const u32 amount = PowerPC::ppcState.gpr[inst.RB];
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PowerPC::ppcState.gpr[inst.RA] =
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(amount & 0x20) != 0 ? 0 : PowerPC::ppcState.gpr[inst.RS] << (amount & 0x1f);
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::srawx(UGeckoInstruction inst)
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{
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const u32 rb = rGPR[inst.RB];
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const u32 rb = PowerPC::ppcState.gpr[inst.RB];
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if ((rb & 0x20) != 0)
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{
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if ((rGPR[inst.RS] & 0x80000000) != 0)
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if ((PowerPC::ppcState.gpr[inst.RS] & 0x80000000) != 0)
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{
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rGPR[inst.RA] = 0xFFFFFFFF;
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PowerPC::ppcState.gpr[inst.RA] = 0xFFFFFFFF;
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PowerPC::SetCarry(1);
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}
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else
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{
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rGPR[inst.RA] = 0x00000000;
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PowerPC::ppcState.gpr[inst.RA] = 0x00000000;
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PowerPC::SetCarry(0);
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}
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}
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else
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{
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const u32 amount = rb & 0x1f;
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const s32 rrs = s32(rGPR[inst.RS]);
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rGPR[inst.RA] = u32(rrs >> amount);
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const s32 rrs = s32(PowerPC::ppcState.gpr[inst.RS]);
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PowerPC::ppcState.gpr[inst.RA] = u32(rrs >> amount);
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PowerPC::SetCarry(rrs < 0 && amount > 0 && (u32(rrs) << (32 - amount)) != 0);
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}
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::srawix(UGeckoInstruction inst)
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{
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const u32 amount = inst.SH;
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const s32 rrs = s32(rGPR[inst.RS]);
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const s32 rrs = s32(PowerPC::ppcState.gpr[inst.RS]);
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rGPR[inst.RA] = u32(rrs >> amount);
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PowerPC::ppcState.gpr[inst.RA] = u32(rrs >> amount);
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PowerPC::SetCarry(rrs < 0 && amount > 0 && (u32(rrs) << (32 - amount)) != 0);
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::srwx(UGeckoInstruction inst)
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{
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const u32 amount = rGPR[inst.RB];
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rGPR[inst.RA] = (amount & 0x20) != 0 ? 0 : (rGPR[inst.RS] >> (amount & 0x1f));
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const u32 amount = PowerPC::ppcState.gpr[inst.RB];
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PowerPC::ppcState.gpr[inst.RA] =
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(amount & 0x20) != 0 ? 0 : (PowerPC::ppcState.gpr[inst.RS] >> (amount & 0x1f));
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if (inst.Rc)
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Helper_UpdateCR0(rGPR[inst.RA]);
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Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
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}
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void Interpreter::tw(UGeckoInstruction inst)
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{
|
||||
const s32 a = s32(rGPR[inst.RA]);
|
||||
const s32 b = s32(rGPR[inst.RB]);
|
||||
const s32 a = s32(PowerPC::ppcState.gpr[inst.RA]);
|
||||
const s32 b = s32(PowerPC::ppcState.gpr[inst.RB]);
|
||||
const u32 TO = inst.TO;
|
||||
|
||||
DEBUG_LOG_FMT(POWERPC, "tw rA {:x} rB {:x} TO {:x}", a, b, TO);
|
||||
|
|
@ -350,10 +359,10 @@ void Interpreter::tw(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::xorx(UGeckoInstruction inst)
|
||||
{
|
||||
rGPR[inst.RA] = rGPR[inst.RS] ^ rGPR[inst.RB];
|
||||
PowerPC::ppcState.gpr[inst.RA] = PowerPC::ppcState.gpr[inst.RS] ^ PowerPC::ppcState.gpr[inst.RB];
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR0(rGPR[inst.RA]);
|
||||
Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RA]);
|
||||
}
|
||||
|
||||
static bool HasAddOverflowed(u32 x, u32 y, u32 result)
|
||||
|
|
@ -365,11 +374,11 @@ static bool HasAddOverflowed(u32 x, u32 y, u32 result)
|
|||
|
||||
void Interpreter::addx(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = rGPR[inst.RA];
|
||||
const u32 b = rGPR[inst.RB];
|
||||
const u32 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const u32 result = a + b;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
|
||||
if (inst.OE)
|
||||
PowerPC::SetXER_OV(HasAddOverflowed(a, b, result));
|
||||
|
|
@ -380,11 +389,11 @@ void Interpreter::addx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::addcx(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = rGPR[inst.RA];
|
||||
const u32 b = rGPR[inst.RB];
|
||||
const u32 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const u32 result = a + b;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(Helper_Carry(a, b));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
@ -397,11 +406,11 @@ void Interpreter::addcx(UGeckoInstruction inst)
|
|||
void Interpreter::addex(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 carry = PowerPC::GetCarry();
|
||||
const u32 a = rGPR[inst.RA];
|
||||
const u32 b = rGPR[inst.RB];
|
||||
const u32 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const u32 result = a + b + carry;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(Helper_Carry(a, b) || (carry != 0 && Helper_Carry(a + b, carry)));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
@ -414,11 +423,11 @@ void Interpreter::addex(UGeckoInstruction inst)
|
|||
void Interpreter::addmex(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 carry = PowerPC::GetCarry();
|
||||
const u32 a = rGPR[inst.RA];
|
||||
const u32 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = 0xFFFFFFFF;
|
||||
const u32 result = a + b + carry;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(Helper_Carry(a, carry - 1));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
@ -431,10 +440,10 @@ void Interpreter::addmex(UGeckoInstruction inst)
|
|||
void Interpreter::addzex(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 carry = PowerPC::GetCarry();
|
||||
const u32 a = rGPR[inst.RA];
|
||||
const u32 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 result = a + carry;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(Helper_Carry(a, carry));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
@ -446,58 +455,58 @@ void Interpreter::addzex(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::divwx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto a = s32(rGPR[inst.RA]);
|
||||
const auto b = s32(rGPR[inst.RB]);
|
||||
const auto a = s32(PowerPC::ppcState.gpr[inst.RA]);
|
||||
const auto b = s32(PowerPC::ppcState.gpr[inst.RB]);
|
||||
const bool overflow = b == 0 || (static_cast<u32>(a) == 0x80000000 && b == -1);
|
||||
|
||||
if (overflow)
|
||||
{
|
||||
if (a < 0)
|
||||
rGPR[inst.RD] = UINT32_MAX;
|
||||
PowerPC::ppcState.gpr[inst.RD] = UINT32_MAX;
|
||||
else
|
||||
rGPR[inst.RD] = 0;
|
||||
PowerPC::ppcState.gpr[inst.RD] = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
rGPR[inst.RD] = static_cast<u32>(a / b);
|
||||
PowerPC::ppcState.gpr[inst.RD] = static_cast<u32>(a / b);
|
||||
}
|
||||
|
||||
if (inst.OE)
|
||||
PowerPC::SetXER_OV(overflow);
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR0(rGPR[inst.RD]);
|
||||
Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RD]);
|
||||
}
|
||||
|
||||
void Interpreter::divwux(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = rGPR[inst.RA];
|
||||
const u32 b = rGPR[inst.RB];
|
||||
const u32 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const bool overflow = b == 0;
|
||||
|
||||
if (overflow)
|
||||
{
|
||||
rGPR[inst.RD] = 0;
|
||||
PowerPC::ppcState.gpr[inst.RD] = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
rGPR[inst.RD] = a / b;
|
||||
PowerPC::ppcState.gpr[inst.RD] = a / b;
|
||||
}
|
||||
|
||||
if (inst.OE)
|
||||
PowerPC::SetXER_OV(overflow);
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR0(rGPR[inst.RD]);
|
||||
Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RD]);
|
||||
}
|
||||
|
||||
void Interpreter::mulhwx(UGeckoInstruction inst)
|
||||
{
|
||||
const s64 a = static_cast<s32>(rGPR[inst.RA]);
|
||||
const s64 b = static_cast<s32>(rGPR[inst.RB]);
|
||||
const s64 a = static_cast<s32>(PowerPC::ppcState.gpr[inst.RA]);
|
||||
const s64 b = static_cast<s32>(PowerPC::ppcState.gpr[inst.RB]);
|
||||
const u32 d = static_cast<u32>((a * b) >> 32);
|
||||
|
||||
rGPR[inst.RD] = d;
|
||||
PowerPC::ppcState.gpr[inst.RD] = d;
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR0(d);
|
||||
|
|
@ -505,11 +514,11 @@ void Interpreter::mulhwx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::mulhwux(UGeckoInstruction inst)
|
||||
{
|
||||
const u64 a = rGPR[inst.RA];
|
||||
const u64 b = rGPR[inst.RB];
|
||||
const u64 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
const u64 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const u32 d = static_cast<u32>((a * b) >> 32);
|
||||
|
||||
rGPR[inst.RD] = d;
|
||||
PowerPC::ppcState.gpr[inst.RD] = d;
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR0(d);
|
||||
|
|
@ -517,39 +526,39 @@ void Interpreter::mulhwux(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::mullwx(UGeckoInstruction inst)
|
||||
{
|
||||
const s64 a = static_cast<s32>(rGPR[inst.RA]);
|
||||
const s64 b = static_cast<s32>(rGPR[inst.RB]);
|
||||
const s64 a = static_cast<s32>(PowerPC::ppcState.gpr[inst.RA]);
|
||||
const s64 b = static_cast<s32>(PowerPC::ppcState.gpr[inst.RB]);
|
||||
const s64 result = a * b;
|
||||
|
||||
rGPR[inst.RD] = static_cast<u32>(result);
|
||||
PowerPC::ppcState.gpr[inst.RD] = static_cast<u32>(result);
|
||||
|
||||
if (inst.OE)
|
||||
PowerPC::SetXER_OV(result < -0x80000000LL || result > 0x7FFFFFFFLL);
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR0(rGPR[inst.RD]);
|
||||
Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RD]);
|
||||
}
|
||||
|
||||
void Interpreter::negx(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = rGPR[inst.RA];
|
||||
const u32 a = PowerPC::ppcState.gpr[inst.RA];
|
||||
|
||||
rGPR[inst.RD] = (~a) + 1;
|
||||
PowerPC::ppcState.gpr[inst.RD] = (~a) + 1;
|
||||
|
||||
if (inst.OE)
|
||||
PowerPC::SetXER_OV(a == 0x80000000);
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR0(rGPR[inst.RD]);
|
||||
Helper_UpdateCR0(PowerPC::ppcState.gpr[inst.RD]);
|
||||
}
|
||||
|
||||
void Interpreter::subfx(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = ~rGPR[inst.RA];
|
||||
const u32 b = rGPR[inst.RB];
|
||||
const u32 a = ~PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const u32 result = a + b + 1;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
|
||||
if (inst.OE)
|
||||
PowerPC::SetXER_OV(HasAddOverflowed(a, b, result));
|
||||
|
|
@ -560,11 +569,11 @@ void Interpreter::subfx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::subfcx(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = ~rGPR[inst.RA];
|
||||
const u32 b = rGPR[inst.RB];
|
||||
const u32 a = ~PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const u32 result = a + b + 1;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(a == 0xFFFFFFFF || Helper_Carry(b, a + 1));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
@ -576,12 +585,12 @@ void Interpreter::subfcx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::subfex(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = ~rGPR[inst.RA];
|
||||
const u32 b = rGPR[inst.RB];
|
||||
const u32 a = ~PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = PowerPC::ppcState.gpr[inst.RB];
|
||||
const u32 carry = PowerPC::GetCarry();
|
||||
const u32 result = a + b + carry;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(Helper_Carry(a, b) || Helper_Carry(a + b, carry));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
@ -594,12 +603,12 @@ void Interpreter::subfex(UGeckoInstruction inst)
|
|||
// sub from minus one
|
||||
void Interpreter::subfmex(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = ~rGPR[inst.RA];
|
||||
const u32 a = ~PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 b = 0xFFFFFFFF;
|
||||
const u32 carry = PowerPC::GetCarry();
|
||||
const u32 result = a + b + carry;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(Helper_Carry(a, carry - 1));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
@ -612,11 +621,11 @@ void Interpreter::subfmex(UGeckoInstruction inst)
|
|||
// sub from zero
|
||||
void Interpreter::subfzex(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 a = ~rGPR[inst.RA];
|
||||
const u32 a = ~PowerPC::ppcState.gpr[inst.RA];
|
||||
const u32 carry = PowerPC::GetCarry();
|
||||
const u32 result = a + carry;
|
||||
|
||||
rGPR[inst.RD] = result;
|
||||
PowerPC::ppcState.gpr[inst.RD] = result;
|
||||
PowerPC::SetCarry(Helper_Carry(a, carry));
|
||||
|
||||
if (inst.OE)
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ void Interpreter::lbz(UGeckoInstruction inst)
|
|||
const u32 temp = PowerPC::Read_U8(Helper_Get_EA(PowerPC::ppcState, inst));
|
||||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
|
||||
void Interpreter::lbzu(UGeckoInstruction inst)
|
||||
|
|
@ -52,8 +52,8 @@ void Interpreter::lbzu(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -88,7 +88,7 @@ void Interpreter::lfdu(UGeckoInstruction inst)
|
|||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rPS(inst.FD).SetPS0(temp);
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -107,7 +107,7 @@ void Interpreter::lfdux(UGeckoInstruction inst)
|
|||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rPS(inst.FD).SetPS0(temp);
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -162,7 +162,7 @@ void Interpreter::lfsu(UGeckoInstruction inst)
|
|||
{
|
||||
const u64 value = ConvertToDouble(temp);
|
||||
rPS(inst.FD).Fill(value);
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -182,7 +182,7 @@ void Interpreter::lfsux(UGeckoInstruction inst)
|
|||
{
|
||||
const u64 value = ConvertToDouble(temp);
|
||||
rPS(inst.FD).Fill(value);
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -211,7 +211,7 @@ void Interpreter::lha(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -222,8 +222,8 @@ void Interpreter::lhau(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -233,7 +233,7 @@ void Interpreter::lhz(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -244,8 +244,8 @@ void Interpreter::lhzu(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -272,7 +272,7 @@ void Interpreter::lmw(UGeckoInstruction inst)
|
|||
}
|
||||
else
|
||||
{
|
||||
rGPR[i] = temp_reg;
|
||||
PowerPC::ppcState.gpr[i] = temp_reg;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -290,7 +290,7 @@ void Interpreter::stmw(UGeckoInstruction inst)
|
|||
|
||||
for (u32 i = inst.RS; i <= 31; i++, address += 4)
|
||||
{
|
||||
PowerPC::Write_U32(rGPR[i], address);
|
||||
PowerPC::Write_U32(PowerPC::ppcState.gpr[i], address);
|
||||
if ((PowerPC::ppcState.Exceptions & EXCEPTION_DSI) != 0)
|
||||
{
|
||||
PanicAlertFmt("DSI exception in stmw");
|
||||
|
|
@ -307,7 +307,7 @@ void Interpreter::lwz(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -318,24 +318,24 @@ void Interpreter::lwzu(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
void Interpreter::stb(UGeckoInstruction inst)
|
||||
{
|
||||
PowerPC::Write_U8(rGPR[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
|
||||
PowerPC::Write_U8(PowerPC::ppcState.gpr[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
|
||||
}
|
||||
|
||||
void Interpreter::stbu(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 address = Helper_Get_EA_U(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U8(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U8(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -365,7 +365,7 @@ void Interpreter::stfdu(UGeckoInstruction inst)
|
|||
PowerPC::Write_U64(rPS(inst.FS).PS0AsU64(), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -395,39 +395,39 @@ void Interpreter::stfsu(UGeckoInstruction inst)
|
|||
PowerPC::Write_U32(ConvertToSingle(rPS(inst.FS).PS0AsU64()), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
void Interpreter::sth(UGeckoInstruction inst)
|
||||
{
|
||||
PowerPC::Write_U16(rGPR[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
|
||||
PowerPC::Write_U16(PowerPC::ppcState.gpr[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
|
||||
}
|
||||
|
||||
void Interpreter::sthu(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 address = Helper_Get_EA_U(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U16(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U16(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
void Interpreter::stw(UGeckoInstruction inst)
|
||||
{
|
||||
PowerPC::Write_U32(rGPR[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
|
||||
PowerPC::Write_U32(PowerPC::ppcState.gpr[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
|
||||
}
|
||||
|
||||
void Interpreter::stwu(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 address = Helper_Get_EA_U(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U32(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U32(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -560,7 +560,7 @@ void Interpreter::eciwx(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[inst.RD] = PowerPC::Read_U32(EA);
|
||||
PowerPC::ppcState.gpr[inst.RD] = PowerPC::Read_U32(EA);
|
||||
}
|
||||
|
||||
void Interpreter::ecowx(UGeckoInstruction inst)
|
||||
|
|
@ -579,7 +579,7 @@ void Interpreter::ecowx(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U32(rGPR[inst.RS], EA);
|
||||
PowerPC::Write_U32(PowerPC::ppcState.gpr[inst.RS], EA);
|
||||
}
|
||||
|
||||
void Interpreter::eieio(UGeckoInstruction inst)
|
||||
|
|
@ -604,8 +604,8 @@ void Interpreter::lbzux(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -615,7 +615,7 @@ void Interpreter::lbzx(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -626,8 +626,8 @@ void Interpreter::lhaux(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = u32(temp);
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = u32(temp);
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -637,7 +637,7 @@ void Interpreter::lhax(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = u32(temp);
|
||||
PowerPC::ppcState.gpr[inst.RD] = u32(temp);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -647,7 +647,7 @@ void Interpreter::lhbrx(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -658,8 +658,8 @@ void Interpreter::lhzux(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -669,7 +669,7 @@ void Interpreter::lhzx(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -684,14 +684,14 @@ void Interpreter::lswx(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
// Confirmed by hardware test that the zero case doesn't zero rGPR[r]
|
||||
// Confirmed by hardware test that the zero case doesn't zero gpr[r]
|
||||
for (u32 n = 0; n < static_cast<u8>(PowerPC::ppcState.xer_stringctrl); n++)
|
||||
{
|
||||
const u32 reg = (inst.RD + (n >> 2)) & 0x1f;
|
||||
const u32 offset = (n & 3) << 3;
|
||||
|
||||
if ((n & 0b11) == 0)
|
||||
rGPR[reg] = 0;
|
||||
PowerPC::ppcState.gpr[reg] = 0;
|
||||
|
||||
const u32 temp_value = PowerPC::Read_U8(EA) << (24 - offset);
|
||||
// Not64 (Homebrew N64 Emulator for Wii) triggers the following case.
|
||||
|
|
@ -700,7 +700,7 @@ void Interpreter::lswx(UGeckoInstruction inst)
|
|||
NOTICE_LOG_FMT(POWERPC, "DSI exception in lswx");
|
||||
return;
|
||||
}
|
||||
rGPR[reg] |= temp_value;
|
||||
PowerPC::ppcState.gpr[reg] |= temp_value;
|
||||
|
||||
EA++;
|
||||
}
|
||||
|
|
@ -712,7 +712,7 @@ void Interpreter::lwbrx(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -723,8 +723,8 @@ void Interpreter::lwzux(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -735,7 +735,7 @@ void Interpreter::lwzx(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -743,16 +743,16 @@ void Interpreter::stbux(UGeckoInstruction inst)
|
|||
{
|
||||
const u32 address = Helper_Get_EA_UX(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U8(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U8(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
void Interpreter::stbx(UGeckoInstruction inst)
|
||||
{
|
||||
PowerPC::Write_U8(rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
|
||||
PowerPC::Write_U8(PowerPC::ppcState.gpr[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
|
||||
}
|
||||
|
||||
void Interpreter::stfdux(UGeckoInstruction inst)
|
||||
|
|
@ -768,7 +768,7 @@ void Interpreter::stfdux(UGeckoInstruction inst)
|
|||
PowerPC::Write_U64(rPS(inst.FS).PS0AsU64(), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -812,7 +812,7 @@ void Interpreter::stfsux(UGeckoInstruction inst)
|
|||
PowerPC::Write_U32(ConvertToSingle(rPS(inst.FS).PS0AsU64()), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -831,23 +831,23 @@ void Interpreter::stfsx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::sthbrx(UGeckoInstruction inst)
|
||||
{
|
||||
PowerPC::Write_U16_Swap(rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
|
||||
PowerPC::Write_U16_Swap(PowerPC::ppcState.gpr[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
|
||||
}
|
||||
|
||||
void Interpreter::sthux(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 address = Helper_Get_EA_UX(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U16(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U16(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
void Interpreter::sthx(UGeckoInstruction inst)
|
||||
{
|
||||
PowerPC::Write_U16(rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
|
||||
PowerPC::Write_U16(PowerPC::ppcState.gpr[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
|
||||
}
|
||||
|
||||
// lswi - bizarro string instruction
|
||||
|
|
@ -856,7 +856,7 @@ void Interpreter::lswi(UGeckoInstruction inst)
|
|||
{
|
||||
u32 EA = 0;
|
||||
if (inst.RA != 0)
|
||||
EA = rGPR[inst.RA];
|
||||
EA = PowerPC::ppcState.gpr[inst.RA];
|
||||
|
||||
if (PowerPC::ppcState.msr.LE)
|
||||
{
|
||||
|
|
@ -876,7 +876,7 @@ void Interpreter::lswi(UGeckoInstruction inst)
|
|||
{
|
||||
r++;
|
||||
r &= 31;
|
||||
rGPR[r] = 0;
|
||||
PowerPC::ppcState.gpr[r] = 0;
|
||||
}
|
||||
|
||||
const u32 temp_value = PowerPC::Read_U8(EA) << (24 - i);
|
||||
|
|
@ -886,7 +886,7 @@ void Interpreter::lswi(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[r] |= temp_value;
|
||||
PowerPC::ppcState.gpr[r] |= temp_value;
|
||||
|
||||
i += 8;
|
||||
if (i == 32)
|
||||
|
|
@ -903,7 +903,7 @@ void Interpreter::stswi(UGeckoInstruction inst)
|
|||
{
|
||||
u32 EA = 0;
|
||||
if (inst.RA != 0)
|
||||
EA = rGPR[inst.RA];
|
||||
EA = PowerPC::ppcState.gpr[inst.RA];
|
||||
|
||||
if (PowerPC::ppcState.msr.LE)
|
||||
{
|
||||
|
|
@ -924,7 +924,7 @@ void Interpreter::stswi(UGeckoInstruction inst)
|
|||
r++;
|
||||
r &= 31;
|
||||
}
|
||||
PowerPC::Write_U8((rGPR[r] >> (24 - i)) & 0xFF, EA);
|
||||
PowerPC::Write_U8((PowerPC::ppcState.gpr[r] >> (24 - i)) & 0xFF, EA);
|
||||
if ((PowerPC::ppcState.Exceptions & EXCEPTION_DSI) != 0)
|
||||
{
|
||||
return;
|
||||
|
|
@ -955,7 +955,7 @@ void Interpreter::stswx(UGeckoInstruction inst)
|
|||
|
||||
while (n > 0)
|
||||
{
|
||||
PowerPC::Write_U8((rGPR[r] >> (24 - i)) & 0xFF, EA);
|
||||
PowerPC::Write_U8((PowerPC::ppcState.gpr[r] >> (24 - i)) & 0xFF, EA);
|
||||
|
||||
EA++;
|
||||
n--;
|
||||
|
|
@ -972,7 +972,7 @@ void Interpreter::stwbrx(UGeckoInstruction inst)
|
|||
{
|
||||
const u32 address = Helper_Get_EA_X(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U32_Swap(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U32_Swap(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
}
|
||||
|
||||
// The following two instructions are for SMP communications. On a single
|
||||
|
|
@ -992,7 +992,7 @@ void Interpreter::lwarx(UGeckoInstruction inst)
|
|||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RD] = temp;
|
||||
PowerPC::ppcState.gpr[inst.RD] = temp;
|
||||
PowerPC::ppcState.reserve = true;
|
||||
PowerPC::ppcState.reserve_address = address;
|
||||
}
|
||||
|
|
@ -1013,7 +1013,7 @@ void Interpreter::stwcxd(UGeckoInstruction inst)
|
|||
{
|
||||
if (address == PowerPC::ppcState.reserve_address)
|
||||
{
|
||||
PowerPC::Write_U32(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U32(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
PowerPC::ppcState.reserve = false;
|
||||
|
|
@ -1030,10 +1030,10 @@ void Interpreter::stwux(UGeckoInstruction inst)
|
|||
{
|
||||
const u32 address = Helper_Get_EA_UX(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U32(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U32(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rGPR[inst.RA] = address;
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1041,7 +1041,7 @@ void Interpreter::stwx(UGeckoInstruction inst)
|
|||
{
|
||||
const u32 address = Helper_Get_EA_X(PowerPC::ppcState, inst);
|
||||
|
||||
PowerPC::Write_U32(rGPR[inst.RS], address);
|
||||
PowerPC::Write_U32(PowerPC::ppcState.gpr[inst.RS], address);
|
||||
}
|
||||
|
||||
void Interpreter::sync(UGeckoInstruction inst)
|
||||
|
|
@ -1058,7 +1058,7 @@ void Interpreter::tlbie(UGeckoInstruction inst)
|
|||
}
|
||||
|
||||
// Invalidate TLB entry
|
||||
const u32 address = rGPR[inst.RB];
|
||||
const u32 address = PowerPC::ppcState.gpr[inst.RB];
|
||||
|
||||
PowerPC::InvalidateTLBEntry(address);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -316,7 +316,7 @@ void Interpreter::psq_l(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
const u32 EA = inst.RA ? (rGPR[inst.RA] + u32(inst.SIMM_12)) : u32(inst.SIMM_12);
|
||||
const u32 EA = inst.RA ? (PowerPC::ppcState.gpr[inst.RA] + u32(inst.SIMM_12)) : u32(inst.SIMM_12);
|
||||
Helper_Dequantize(&PowerPC::ppcState, EA, inst.I, inst.RD, inst.W);
|
||||
}
|
||||
|
||||
|
|
@ -328,7 +328,7 @@ void Interpreter::psq_lu(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
const u32 EA = rGPR[inst.RA] + u32(inst.SIMM_12);
|
||||
const u32 EA = PowerPC::ppcState.gpr[inst.RA] + u32(inst.SIMM_12);
|
||||
Helper_Dequantize(&PowerPC::ppcState, EA, inst.I, inst.RD, inst.W);
|
||||
|
||||
if ((PowerPC::ppcState.Exceptions & EXCEPTION_DSI) != 0)
|
||||
|
|
@ -336,7 +336,7 @@ void Interpreter::psq_lu(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[inst.RA] = EA;
|
||||
PowerPC::ppcState.gpr[inst.RA] = EA;
|
||||
}
|
||||
|
||||
void Interpreter::psq_st(UGeckoInstruction inst)
|
||||
|
|
@ -347,7 +347,7 @@ void Interpreter::psq_st(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
const u32 EA = inst.RA ? (rGPR[inst.RA] + u32(inst.SIMM_12)) : u32(inst.SIMM_12);
|
||||
const u32 EA = inst.RA ? (PowerPC::ppcState.gpr[inst.RA] + u32(inst.SIMM_12)) : u32(inst.SIMM_12);
|
||||
Helper_Quantize(&PowerPC::ppcState, EA, inst.I, inst.RS, inst.W);
|
||||
}
|
||||
|
||||
|
|
@ -359,7 +359,7 @@ void Interpreter::psq_stu(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
const u32 EA = rGPR[inst.RA] + u32(inst.SIMM_12);
|
||||
const u32 EA = PowerPC::ppcState.gpr[inst.RA] + u32(inst.SIMM_12);
|
||||
Helper_Quantize(&PowerPC::ppcState, EA, inst.I, inst.RS, inst.W);
|
||||
|
||||
if ((PowerPC::ppcState.Exceptions & EXCEPTION_DSI) != 0)
|
||||
|
|
@ -367,24 +367,26 @@ void Interpreter::psq_stu(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[inst.RA] = EA;
|
||||
PowerPC::ppcState.gpr[inst.RA] = EA;
|
||||
}
|
||||
|
||||
void Interpreter::psq_lx(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 EA = inst.RA ? (rGPR[inst.RA] + rGPR[inst.RB]) : rGPR[inst.RB];
|
||||
const u32 EA = inst.RA ? (PowerPC::ppcState.gpr[inst.RA] + PowerPC::ppcState.gpr[inst.RB]) :
|
||||
PowerPC::ppcState.gpr[inst.RB];
|
||||
Helper_Dequantize(&PowerPC::ppcState, EA, inst.Ix, inst.RD, inst.Wx);
|
||||
}
|
||||
|
||||
void Interpreter::psq_stx(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 EA = inst.RA ? (rGPR[inst.RA] + rGPR[inst.RB]) : rGPR[inst.RB];
|
||||
const u32 EA = inst.RA ? (PowerPC::ppcState.gpr[inst.RA] + PowerPC::ppcState.gpr[inst.RB]) :
|
||||
PowerPC::ppcState.gpr[inst.RB];
|
||||
Helper_Quantize(&PowerPC::ppcState, EA, inst.Ix, inst.RS, inst.Wx);
|
||||
}
|
||||
|
||||
void Interpreter::psq_lux(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 EA = rGPR[inst.RA] + rGPR[inst.RB];
|
||||
const u32 EA = PowerPC::ppcState.gpr[inst.RA] + PowerPC::ppcState.gpr[inst.RB];
|
||||
Helper_Dequantize(&PowerPC::ppcState, EA, inst.Ix, inst.RD, inst.Wx);
|
||||
|
||||
if ((PowerPC::ppcState.Exceptions & EXCEPTION_DSI) != 0)
|
||||
|
|
@ -392,12 +394,12 @@ void Interpreter::psq_lux(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[inst.RA] = EA;
|
||||
PowerPC::ppcState.gpr[inst.RA] = EA;
|
||||
}
|
||||
|
||||
void Interpreter::psq_stux(UGeckoInstruction inst)
|
||||
{
|
||||
const u32 EA = rGPR[inst.RA] + rGPR[inst.RB];
|
||||
const u32 EA = PowerPC::ppcState.gpr[inst.RA] + PowerPC::ppcState.gpr[inst.RB];
|
||||
Helper_Quantize(&PowerPC::ppcState, EA, inst.Ix, inst.RS, inst.Wx);
|
||||
|
||||
if ((PowerPC::ppcState.Exceptions & EXCEPTION_DSI) != 0)
|
||||
|
|
@ -405,5 +407,5 @@ void Interpreter::psq_stux(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[inst.RA] = EA;
|
||||
PowerPC::ppcState.gpr[inst.RA] = EA;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ void Interpreter::mcrxr(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::mfcr(UGeckoInstruction inst)
|
||||
{
|
||||
rGPR[inst.RD] = PowerPC::ppcState.cr.Get();
|
||||
PowerPC::ppcState.gpr[inst.RD] = PowerPC::ppcState.cr.Get();
|
||||
}
|
||||
|
||||
void Interpreter::mtcrf(UGeckoInstruction inst)
|
||||
|
|
@ -110,7 +110,7 @@ void Interpreter::mtcrf(UGeckoInstruction inst)
|
|||
const u32 crm = inst.CRM;
|
||||
if (crm == 0xFF)
|
||||
{
|
||||
PowerPC::ppcState.cr.Set(rGPR[inst.RS]);
|
||||
PowerPC::ppcState.cr.Set(PowerPC::ppcState.gpr[inst.RS]);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -122,7 +122,8 @@ void Interpreter::mtcrf(UGeckoInstruction inst)
|
|||
mask |= 0xFU << (i * 4);
|
||||
}
|
||||
|
||||
PowerPC::ppcState.cr.Set((PowerPC::ppcState.cr.Get() & ~mask) | (rGPR[inst.RS] & mask));
|
||||
PowerPC::ppcState.cr.Set((PowerPC::ppcState.cr.Get() & ~mask) |
|
||||
(PowerPC::ppcState.gpr[inst.RS] & mask));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -134,7 +135,7 @@ void Interpreter::mfmsr(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[inst.RD] = PowerPC::ppcState.msr.Hex;
|
||||
PowerPC::ppcState.gpr[inst.RD] = PowerPC::ppcState.msr.Hex;
|
||||
}
|
||||
|
||||
void Interpreter::mfsr(UGeckoInstruction inst)
|
||||
|
|
@ -145,7 +146,7 @@ void Interpreter::mfsr(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
rGPR[inst.RD] = PowerPC::ppcState.sr[inst.SR];
|
||||
PowerPC::ppcState.gpr[inst.RD] = PowerPC::ppcState.sr[inst.SR];
|
||||
}
|
||||
|
||||
void Interpreter::mfsrin(UGeckoInstruction inst)
|
||||
|
|
@ -156,8 +157,8 @@ void Interpreter::mfsrin(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
const u32 index = (rGPR[inst.RB] >> 28) & 0xF;
|
||||
rGPR[inst.RD] = PowerPC::ppcState.sr[index];
|
||||
const u32 index = (PowerPC::ppcState.gpr[inst.RB] >> 28) & 0xF;
|
||||
PowerPC::ppcState.gpr[inst.RD] = PowerPC::ppcState.sr[index];
|
||||
}
|
||||
|
||||
void Interpreter::mtmsr(UGeckoInstruction inst)
|
||||
|
|
@ -168,7 +169,7 @@ void Interpreter::mtmsr(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
PowerPC::ppcState.msr.Hex = rGPR[inst.RS];
|
||||
PowerPC::ppcState.msr.Hex = PowerPC::ppcState.gpr[inst.RS];
|
||||
|
||||
// FE0/FE1 may have been set
|
||||
CheckFPExceptions(PowerPC::ppcState.fpscr);
|
||||
|
|
@ -188,7 +189,7 @@ void Interpreter::mtsr(UGeckoInstruction inst)
|
|||
}
|
||||
|
||||
const u32 index = inst.SR;
|
||||
const u32 value = rGPR[inst.RS];
|
||||
const u32 value = PowerPC::ppcState.gpr[inst.RS];
|
||||
PowerPC::ppcState.SetSR(index, value);
|
||||
}
|
||||
|
||||
|
|
@ -200,8 +201,8 @@ void Interpreter::mtsrin(UGeckoInstruction inst)
|
|||
return;
|
||||
}
|
||||
|
||||
const u32 index = (rGPR[inst.RB] >> 28) & 0xF;
|
||||
const u32 value = rGPR[inst.RS];
|
||||
const u32 index = (PowerPC::ppcState.gpr[inst.RB] >> 28) & 0xF;
|
||||
const u32 value = PowerPC::ppcState.gpr[inst.RS];
|
||||
PowerPC::ppcState.SetSR(index, value);
|
||||
}
|
||||
|
||||
|
|
@ -277,10 +278,10 @@ void Interpreter::mfspr(UGeckoInstruction inst)
|
|||
// A strange quirk: reading back this register on hardware will always have the TE (Translation
|
||||
// enabled) bit set to 0 (despite the bit appearing to function normally when set). This does
|
||||
// not apply to the DABR.
|
||||
rGPR[inst.RD] = rSPR(index) & ~1;
|
||||
PowerPC::ppcState.gpr[inst.RD] = rSPR(index) & ~1;
|
||||
return;
|
||||
}
|
||||
rGPR[inst.RD] = rSPR(index);
|
||||
PowerPC::ppcState.gpr[inst.RD] = rSPR(index);
|
||||
}
|
||||
|
||||
void Interpreter::mtspr(UGeckoInstruction inst)
|
||||
|
|
@ -295,7 +296,7 @@ void Interpreter::mtspr(UGeckoInstruction inst)
|
|||
}
|
||||
|
||||
const u32 old_value = rSPR(index);
|
||||
rSPR(index) = rGPR[inst.RD];
|
||||
rSPR(index) = PowerPC::ppcState.gpr[inst.RD];
|
||||
|
||||
// Our DMA emulation is highly inaccurate - instead of properly emulating the queue
|
||||
// and so on, we simply make all DMA:s complete instantaneously.
|
||||
|
|
@ -308,12 +309,12 @@ void Interpreter::mtspr(UGeckoInstruction inst)
|
|||
break;
|
||||
|
||||
case SPR_TL_W:
|
||||
TL = rGPR[inst.RD];
|
||||
TL = PowerPC::ppcState.gpr[inst.RD];
|
||||
SystemTimers::TimeBaseSet();
|
||||
break;
|
||||
|
||||
case SPR_TU_W:
|
||||
TU = rGPR[inst.RD];
|
||||
TU = PowerPC::ppcState.gpr[inst.RD];
|
||||
SystemTimers::TimeBaseSet();
|
||||
break;
|
||||
|
||||
|
|
@ -413,7 +414,7 @@ void Interpreter::mtspr(UGeckoInstruction inst)
|
|||
|
||||
case SPR_DEC:
|
||||
// Top bit from 0 to 1
|
||||
if ((old_value >> 31) == 0 && (rGPR[inst.RD] >> 31) != 0)
|
||||
if ((old_value >> 31) == 0 && (PowerPC::ppcState.gpr[inst.RD] >> 31) != 0)
|
||||
{
|
||||
INFO_LOG_FMT(POWERPC, "Software triggered Decrementer exception");
|
||||
PowerPC::ppcState.Exceptions |= EXCEPTION_DECREMENTER;
|
||||
|
|
|
|||
|
|
@ -246,7 +246,6 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
|
|||
#define THRM2(ppc_state) ((UReg_THRM12&)(ppc_state).spr[SPR_THRM2])
|
||||
#define THRM3(ppc_state) ((UReg_THRM3&)(ppc_state).spr[SPR_THRM3])
|
||||
|
||||
#define rGPR PowerPC::ppcState.gpr
|
||||
#define rSPR(i) PowerPC::ppcState.spr[i]
|
||||
#define LR PowerPC::ppcState.spr[SPR_LR]
|
||||
#define CTR PowerPC::ppcState.spr[SPR_CTR]
|
||||
|
|
|
|||
Loading…
Reference in New Issue