some more UCode stuff
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@815 8ced0084-cf51-0410-be5f-012b33b47a6e
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fires.gc
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7c4be7a975
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2521c52847
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@ -7,18 +7,17 @@
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//
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0x0000
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0x0140
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0x0280 // outbuffer left and right... each channel is 0x140 samples long
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0x0400
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0x0000 // RightBuffer
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0x0140 // LeftBuffer
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0x0280
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0x0400 // Opcode_14() interleaves the buffer to this address
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0x0540
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0x0680
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0x07C0
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0x0900
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0x0A40
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0x0B80 to 0x0C40 CurrentPB
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0x0B80 to 0x0C40 // CurrentPB
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0x0B87
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// addresses to buffers
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0x0E08 // initialized to 0x0000
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@ -914,48 +913,59 @@ Main()
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//
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043b 8c00 CLR15
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043c 8a00 M2
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043d 8100 CLR $30
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043e 8970 CLR.L $31 : $30, @$0
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043f 191f LRRI $31, @$0
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0440 2ece SRS @DSMAH, $30
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0441 2fcf SRS @DSMAL, $31
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0442 16cd 0280 SI @DSPA, #0x0280
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0444 16c9 0001 SI @DSCR, #0x0001
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0446 16cb 0280 SI @DSBL, #0x0280
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0448 8f50 S16.L : $26, @$0
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0449 8140 CLR.L $30 : $24, @$0
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044a 0081 0400 LRI $1, #0x0400
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044c 0083 0000 LRI $3, #0x0000
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044e 0082 0140 LRI $2, #0x0140
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0450 0099 0080 LRI $25, #0x0080
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0452 02bf 055c CALL 0x055c // Wait for DMA control reg
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0454 1105 046c BLOOPI #0x05, 0x046c
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0456 1f61 MRR $27, $1
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0457 1120 045e BLOOPI #0x20, 0x045e
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0459 8972 CLR.L $31 : $30, @$2
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045a 195c LRRI $28, @$2
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045b f07b LSL16.L $30 : $31, @$3
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045c 197d LRRI $29, @$3
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045d f131 LSL16.S $31 : @$1, $30
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045e 8139 CLR.S $30 : @$1, $31
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045f 8900 CLR $31
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0460 6800 MOVAX $30, $24
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0461 2ece SRS @DSMAH, $30
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0462 2ccf SRS @DSMAL, $28
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0463 1ffb MRR $31, $27
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0464 2fcd SRS @DSPA, $31
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0465 0f01 LRIS $31, #0x01
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0466 2fc9 SRS @DSCR, $31
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0467 1ff9 MRR $31, $25
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0468 2fcb SRS @DSBL, $31
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0469 7200 ADDAXL $30, $25
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046a 1f5e MRR $26, $30
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046b 1f1c MRR $24, $28
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046c 8100 CLR $30
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// send the 0x280 to 0x500 to CPU RAM
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043d 8100 CLR $30
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043e 8970 CLR.L $31 : $30, @$0
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043f 191f LRRI $31, @$0
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0440 2ece SRS @DSMAH, $30
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0441 2fcf SRS @DSMAL, $31
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0442 16cd 0280 SI @DSPA, #0x0280
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0444 16c9 0001 SI @DSCR, #0x0001
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0446 16cb 0280 SI @DSBL, #0x0280
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0448 8f50 S16.L : $26, @$0
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0449 8140 CLR.L $30 : $24, @$0
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044a 0081 0400 LRI $1, #0x0400
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044c 0083 0000 LRI $3, #0x0000
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044e 0082 0140 LRI $2, #0x0140
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0450 0099 0080 LRI $25, #0x0080
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0452 02bf 055c CALL 0x055c // Wait for DMA control reg
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// interleave loop and DMA the buffer to CPU... call innerloop 5 times (5 * 32Byte)
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0454 1105 046c BLOOPI #0x05, 0x046c
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0456 1f61 MRR $27, $1
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// interleave 32 shorts (from left and right buffer)
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0457 1120 045e BLOOPI #0x20, 0x045e
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0459 8972 CLR.L $31 : $30, @$2
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045a 195c LRRI $28, @$2
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045b f07b LSL16.L $30 : $31, @$3
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045c 197d LRRI $29, @$3
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045d f131 LSL16.S $31 : @$1, $30
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045e 8139 CLR.S $30 : @$1, $31
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// end: innerloop
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045f 8900 CLR $31
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0460 6800 MOVAX $30, $24
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0461 2ece SRS @DSMAH, $30
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0462 2ccf SRS @DSMAL, $28
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0463 1ffb MRR $31, $27
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0464 2fcd SRS @DSPA, $31
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0465 0f01 LRIS $31, #0x01
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0466 2fc9 SRS @DSCR, $31
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0467 1ff9 MRR $31, $25 // $25 is const 0x80
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0468 2fcb SRS @DSBL, $31
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0469 7200 ADDAXL $30, $25
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046a 1f5e MRR $26, $30
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046b 1f1c MRR $24, $28
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046c 8100 CLR $30
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// end: outerloop (strange because shouldnt we wait to the DMA transfer all the time??)
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046d 26c9 LRS $30, @DSCR
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046e 02a0 0004 ANDCF $30, #0x0004
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0470 029c 046d JZR 0x046d // wait for DMA loop
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0472 029f 0068 JMP 0x0068 // Return to message loop.
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0470 029c 046d JZR 0x046d // wait for DMA loop
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0472 029f 0068 JMP 0x0068 // Return to message loop.
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// Opcode_11() - not implemented
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0474 029f 0068 JMP 0x0068 // Return to message loop.
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@ -181,6 +181,7 @@
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// Large mixer function - called a lot by AX
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// Prolly simple Stereo Mixer
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80e7 8150 CLR.L $AC0.M : $AX0.H, @$R00
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80e8 8949 CLR.L $AC1.M : $AX1.L, @$R01
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80e9 b072 MULX.L $AX0.H, $AX1.L : $AC0.M, @$R02
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@ -316,6 +317,8 @@
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816b 9909 ASR16.IR $AC1.M : $R01
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816c 1b7f SRRI @$R03, $AC1.M
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816d 812b CLR.S $AC0.M : @$R03, $AC1.L
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816e 1c04 MRR $R00, $R04
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816f 1c45 MRR $R02, $R05
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8170 1c62 MRR $R03, $R02
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