From 96e92d33b7f81a6ceb9123d9c7497ee1be32fda8 Mon Sep 17 00:00:00 2001 From: Scott Mansell Date: Sat, 6 Sep 2014 17:42:31 +1200 Subject: [PATCH 1/2] Don't write to EXRAM if it doesn't exist. Previously, if a gamecube game wrote to an EXRAM address, dolphin would segfault. --- Source/Core/Core/HW/MemmapFunctions.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Source/Core/Core/HW/MemmapFunctions.cpp b/Source/Core/Core/HW/MemmapFunctions.cpp index 78192556a5..b47587940f 100644 --- a/Source/Core/Core/HW/MemmapFunctions.cpp +++ b/Source/Core/Core/HW/MemmapFunctions.cpp @@ -186,9 +186,9 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address, *(T*)&m_pRAM[em_address & RAM_MASK] = bswap(data); return; } - else if (((em_address & 0xF0000000) == 0x90000000) || + else if (m_pEXRAM && (((em_address & 0xF0000000) == 0x90000000) || ((em_address & 0xF0000000) == 0xD0000000) || - ((em_address & 0xF0000000) == 0x10000000)) + ((em_address & 0xF0000000) == 0x10000000))) { *(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data); return; From 1963717855aa010f53a3cc68831209ce2e824c61 Mon Sep 17 00:00:00 2001 From: Scott Mansell Date: Sat, 6 Sep 2014 18:57:53 +1200 Subject: [PATCH 2/2] Panic on invalid reads/writes for non-mmu games. Previously it would fall through to the mmu code path, and raise a dsi exception, which it would never check for, so it would continue executing code silently. --- Source/Core/Core/HW/MemmapFunctions.cpp | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/Source/Core/Core/HW/MemmapFunctions.cpp b/Source/Core/Core/HW/MemmapFunctions.cpp index b47587940f..83e936c190 100644 --- a/Source/Core/Core/HW/MemmapFunctions.cpp +++ b/Source/Core/Core/HW/MemmapFunctions.cpp @@ -18,6 +18,7 @@ #include "Common/Atomic.h" #include "Common/Common.h" +#include "Core/ConfigManager.h" #include "Core/Core.h" #include "Core/HW/GPFifo.h" #include "Core/HW/Memmap.h" @@ -119,7 +120,7 @@ inline void ReadFromHardware(T &_var, const u32 em_address, const u32 effective_ // fake VMEM _var = bswap((*(const T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK])); } - else + else if (SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU) { // MMU u32 tlb_addr = TranslateAddress(em_address, flag); @@ -135,6 +136,10 @@ inline void ReadFromHardware(T &_var, const u32 em_address, const u32 effective_ _var = bswap((*(const T*)&m_pRAM[tlb_addr & RAM_MASK])); } } + else + { + PanicAlertT("Invalid Read at 0x%08x, PC = 0x%08x ", em_address, PC); + } } @@ -204,7 +209,7 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address, // fake VMEM *(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data); } - else + else if (SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU) { // MMU u32 tlb_addr = TranslateAddress(em_address, flag); @@ -220,6 +225,10 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address, *(T*)&m_pRAM[tlb_addr & RAM_MASK] = bswap(data); } } + else + { + PanicAlertT("Invalid Write to 0x%08x, PC = 0x%08x ", em_address, PC); + } } // =====================