Jit64: Don't store immediate values in register cache
They're now stored in ConstantPropagation instead.
I've also removed the LocationType enum. The location of each guest
register is now tracked using three booleans: Whether it is in ppcState,
whether it is in a host register, and whether it is a known immediate.
The first two of these booleans are stored in the register cache, and
the last one is stored in ConstantPropagation. This new model allows us
to handle the combination of a value simultaneously being in a host
register and being a known immediate. It also keeps track of which
registers are dirty, which was previously kept track of in X64CachedReg.
The old model maps to the new model as follows:
default host_reg immediate
Default true false false
Discarded false false false
Bound (!dirty) true false
Immediate false false true
SpeculativeImmediate true false true
[previously unrepresentable] (!dirty) true true
This commit is contained in:
JosJuice
parent
c9871f772e
commit
2454dbd6b8
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@ -1115,10 +1115,11 @@ bool Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
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CompileInstruction(op);
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}
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m_constant_propagation.Apply(constant_propagation_result, op.regsOut);
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m_constant_propagation.Apply(constant_propagation_result, {});
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if (constant_propagation_result.gpr >= 0)
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{
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// Mark the GPR as dirty in the register cache
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gpr.SetImmediate32(constant_propagation_result.gpr,
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constant_propagation_result.gpr_value);
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}
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@ -75,6 +75,8 @@ public:
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void IntializeSpeculativeConstants();
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JitCommon::ConstantPropagation& GetConstantPropagation() { return m_constant_propagation; }
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JitBlockCache* GetBlockCache() override { return &blocks; }
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void Trace();
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@ -16,111 +16,79 @@ using preg_t = size_t;
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class PPCCachedReg
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{
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public:
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enum class LocationType
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{
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/// Value is currently at its default location
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Default,
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/// Value is not stored anywhere because we know it won't be read before the next write
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Discarded,
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/// Value is currently bound to a x64 register
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Bound,
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/// Value is known as an immediate and has not been written back to its default location
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Immediate,
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/// Value is known as an immediate and is already present at its default location
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SpeculativeImmediate,
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};
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PPCCachedReg() = default;
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explicit PPCCachedReg(Gen::OpArg default_location_)
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: default_location(default_location_), location(default_location_)
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explicit PPCCachedReg(Gen::OpArg default_location) : m_default_location(default_location) {}
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Gen::OpArg GetDefaultLocation() const { return m_default_location; }
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Gen::X64Reg GetHostRegister() const
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{
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ASSERT(m_in_host_register);
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return m_host_register;
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}
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const std::optional<Gen::OpArg>& Location() const { return location; }
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bool IsInDefaultLocation() const { return m_in_default_location; }
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bool IsInHostRegister() const { return m_in_host_register; }
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LocationType GetLocationType() const
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void SetFlushed(bool maintain_host_register)
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{
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if (!location.has_value())
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return LocationType::Discarded;
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if (!away)
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{
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ASSERT(!revertable);
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if (location->IsImm())
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return LocationType::SpeculativeImmediate;
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ASSERT(*location == default_location);
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return LocationType::Default;
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}
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ASSERT(location->IsImm() || location->IsSimpleReg());
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return location->IsImm() ? LocationType::Immediate : LocationType::Bound;
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ASSERT(!m_revertable);
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if (!maintain_host_register)
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m_in_host_register = false;
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m_in_default_location = true;
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}
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bool IsAway() const { return away; }
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bool IsDiscarded() const { return !location.has_value(); }
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bool IsBound() const { return GetLocationType() == LocationType::Bound; }
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void SetBoundTo(Gen::X64Reg xreg)
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void SetInHostRegister(Gen::X64Reg xreg, bool dirty)
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{
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away = true;
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location = Gen::R(xreg);
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if (dirty)
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m_in_default_location = false;
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m_in_host_register = true;
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m_host_register = xreg;
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}
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void SetDirty() { m_in_default_location = false; }
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void SetDiscarded()
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{
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ASSERT(!revertable);
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away = false;
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location = std::nullopt;
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ASSERT(!m_revertable);
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m_in_default_location = false;
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m_in_host_register = false;
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}
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void SetFlushed()
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{
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ASSERT(!revertable);
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away = false;
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location = default_location;
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}
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void SetToImm32(u32 imm32, bool dirty = true)
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{
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away |= dirty;
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location = Gen::Imm32(imm32);
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}
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bool IsRevertable() const { return revertable; }
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bool IsRevertable() const { return m_revertable; }
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void SetRevertable()
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{
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ASSERT(IsBound());
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revertable = true;
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ASSERT(m_in_host_register);
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m_revertable = true;
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}
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void SetRevert()
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{
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ASSERT(revertable);
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revertable = false;
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SetFlushed();
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ASSERT(m_revertable);
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m_revertable = false;
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SetFlushed(false);
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}
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void SetCommit()
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{
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ASSERT(revertable);
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revertable = false;
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ASSERT(m_revertable);
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m_revertable = false;
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}
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bool IsLocked() const { return locked > 0; }
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void Lock() { locked++; }
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bool IsLocked() const { return m_locked > 0; }
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void Lock() { m_locked++; }
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void Unlock()
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{
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ASSERT(IsLocked());
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locked--;
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m_locked--;
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}
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private:
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Gen::OpArg default_location{};
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std::optional<Gen::OpArg> location{};
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bool away = false; // value not in source register
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bool revertable = false;
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size_t locked = 0;
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Gen::OpArg m_default_location{};
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Gen::X64Reg m_host_register{};
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bool m_in_default_location = true;
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bool m_in_host_register = false;
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bool m_revertable = false;
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size_t m_locked = 0;
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};
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class X64CachedReg
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@ -128,25 +96,20 @@ class X64CachedReg
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public:
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preg_t Contents() const { return ppcReg; }
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void SetBoundTo(preg_t ppcReg_, bool dirty_)
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void SetBoundTo(preg_t ppcReg_)
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{
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free = false;
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ppcReg = ppcReg_;
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dirty = dirty_;
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}
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void Unbind()
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{
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ppcReg = static_cast<preg_t>(Gen::INVALID_REG);
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free = true;
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dirty = false;
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}
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bool IsFree() const { return free && !locked; }
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bool IsDirty() const { return dirty; }
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void MakeDirty() { dirty = true; }
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bool IsLocked() const { return locked > 0; }
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void Lock() { locked++; }
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void Unlock()
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@ -158,7 +121,6 @@ public:
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private:
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preg_t ppcReg = static_cast<preg_t>(Gen::INVALID_REG);
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bool free = true;
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bool dirty = false;
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size_t locked = 0;
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};
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@ -13,16 +13,51 @@ FPURegCache::FPURegCache(Jit64& jit) : RegCache{jit}
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{
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}
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bool FPURegCache::IsImm(preg_t preg) const
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{
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return false;
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}
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u32 FPURegCache::Imm32(preg_t preg) const
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{
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ASSERT_MSG(DYNA_REC, false, "FPURegCache doesn't support immediates");
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return 0;
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}
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s32 FPURegCache::SImm32(preg_t preg) const
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{
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ASSERT_MSG(DYNA_REC, false, "FPURegCache doesn't support immediates");
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return 0;
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}
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OpArg FPURegCache::R(preg_t preg) const
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{
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if (m_regs[preg].IsInHostRegister())
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{
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return ::Gen::R(m_regs[preg].GetHostRegister());
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}
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else
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{
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ASSERT_MSG(DYNA_REC, m_regs[preg].IsInDefaultLocation(), "FPR {} missing!", preg);
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return m_regs[preg].GetDefaultLocation();
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}
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}
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void FPURegCache::StoreRegister(preg_t preg, const OpArg& new_loc)
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{
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ASSERT_MSG(DYNA_REC, m_regs[preg].IsBound(), "Unbound register - {}", preg);
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m_emitter->MOVAPD(new_loc, m_regs[preg].Location()->GetSimpleReg());
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ASSERT_MSG(DYNA_REC, m_regs[preg].IsInHostRegister(), "FPR {} not in host register", preg);
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m_emitter->MOVAPD(new_loc, m_regs[preg].GetHostRegister());
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}
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void FPURegCache::LoadRegister(preg_t preg, X64Reg new_loc)
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{
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ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - {}", preg);
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m_emitter->MOVAPD(new_loc, m_regs[preg].Location().value());
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ASSERT_MSG(DYNA_REC, m_regs[preg].IsInDefaultLocation(), "FPR {} not in default location", preg);
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m_emitter->MOVAPD(new_loc, m_regs[preg].GetDefaultLocation());
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}
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void FPURegCache::DiscardImm(preg_t preg)
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{
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// FPURegCache doesn't support immediates, so no need to do anything
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}
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std::span<const X64Reg> FPURegCache::GetAllocationOrder() const
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@ -12,10 +12,16 @@ class FPURegCache final : public RegCache
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public:
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explicit FPURegCache(Jit64& jit);
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bool IsImm(preg_t preg) const override;
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u32 Imm32(preg_t preg) const override;
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s32 SImm32(preg_t preg) const override;
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protected:
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Gen::OpArg R(preg_t preg) const override;
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Gen::OpArg GetDefaultLocation(preg_t preg) const override;
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void StoreRegister(preg_t preg, const Gen::OpArg& newLoc) override;
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void LoadRegister(preg_t preg, Gen::X64Reg newLoc) override;
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void DiscardImm(preg_t preg) override;
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std::span<const Gen::X64Reg> GetAllocationOrder() const override;
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BitSet32 GetRegUtilization() const override;
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BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const override;
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@ -13,16 +13,72 @@ GPRRegCache::GPRRegCache(Jit64& jit) : RegCache{jit}
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{
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}
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bool GPRRegCache::IsImm(preg_t preg) const
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{
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return m_jit.GetConstantPropagation().HasGPR(preg);
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}
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u32 GPRRegCache::Imm32(preg_t preg) const
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{
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ASSERT(m_jit.GetConstantPropagation().HasGPR(preg));
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return m_jit.GetConstantPropagation().GetGPR(preg);
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}
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s32 GPRRegCache::SImm32(preg_t preg) const
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{
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ASSERT(m_jit.GetConstantPropagation().HasGPR(preg));
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return m_jit.GetConstantPropagation().GetGPR(preg);
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}
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OpArg GPRRegCache::R(preg_t preg) const
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{
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if (m_regs[preg].IsInHostRegister())
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{
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return ::Gen::R(m_regs[preg].GetHostRegister());
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}
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else if (m_jit.GetConstantPropagation().HasGPR(preg))
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{
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return ::Gen::Imm32(m_jit.GetConstantPropagation().GetGPR(preg));
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}
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else
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{
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ASSERT_MSG(DYNA_REC, m_regs[preg].IsInDefaultLocation(), "GPR {} missing!", preg);
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return m_regs[preg].GetDefaultLocation();
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}
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}
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void GPRRegCache::StoreRegister(preg_t preg, const OpArg& new_loc)
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{
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ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - {}", preg);
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m_emitter->MOV(32, new_loc, m_regs[preg].Location().value());
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if (m_regs[preg].IsInHostRegister())
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{
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m_emitter->MOV(32, new_loc, ::Gen::R(m_regs[preg].GetHostRegister()));
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}
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else
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{
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ASSERT_MSG(DYNA_REC, m_jit.GetConstantPropagation().HasGPR(preg),
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"GPR {} not in host register or constant propagation", preg);
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m_emitter->MOV(32, new_loc, ::Gen::Imm32(m_jit.GetConstantPropagation().GetGPR(preg)));
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}
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}
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void GPRRegCache::LoadRegister(preg_t preg, X64Reg new_loc)
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{
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ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - {}", preg);
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m_emitter->MOV(32, ::Gen::R(new_loc), m_regs[preg].Location().value());
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const JitCommon::ConstantPropagation& constant_propagation = m_jit.GetConstantPropagation();
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if (constant_propagation.HasGPR(preg))
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{
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m_emitter->MOV(32, ::Gen::R(new_loc), ::Gen::Imm32(constant_propagation.GetGPR(preg)));
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}
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else
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{
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ASSERT_MSG(DYNA_REC, m_regs[preg].IsInDefaultLocation(), "GPR {} not in default location",
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preg);
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m_emitter->MOV(32, ::Gen::R(new_loc), m_regs[preg].GetDefaultLocation());
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}
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}
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void GPRRegCache::DiscardImm(preg_t preg)
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{
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m_jit.GetConstantPropagation().ClearGPR(preg);
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}
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OpArg GPRRegCache::GetDefaultLocation(preg_t preg) const
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@ -48,8 +104,9 @@ void GPRRegCache::SetImmediate32(preg_t preg, u32 imm_value, bool dirty)
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{
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// "dirty" can be false to avoid redundantly flushing an immediate when
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// processing speculative constants.
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DiscardRegContentsIfCached(preg);
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m_regs[preg].SetToImm32(imm_value, dirty);
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m_jit.GetConstantPropagation().SetGPR(preg, imm_value);
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if (dirty)
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DiscardRegister(preg);
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}
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BitSet32 GPRRegCache::GetRegUtilization() const
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@ -11,12 +11,21 @@ class GPRRegCache final : public RegCache
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{
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public:
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explicit GPRRegCache(Jit64& jit);
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using RegCache::IsImm;
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bool IsImm(preg_t preg) const override;
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u32 Imm32(preg_t preg) const override;
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s32 SImm32(preg_t preg) const override;
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void SetImmediate32(preg_t preg, u32 imm_value, bool dirty = true);
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protected:
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Gen::OpArg R(preg_t preg) const override;
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Gen::OpArg GetDefaultLocation(preg_t preg) const override;
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void StoreRegister(preg_t preg, const Gen::OpArg& new_loc) override;
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void LoadRegister(preg_t preg, Gen::X64Reg new_loc) override;
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void DiscardImm(preg_t preg) override;
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std::span<const Gen::X64Reg> GetAllocationOrder() const override;
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BitSet32 GetRegUtilization() const override;
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BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const override;
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@ -136,7 +136,7 @@ bool RCOpArg::IsImm() const
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{
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if (const preg_t* preg = std::get_if<preg_t>(&contents))
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{
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return rc->R(*preg).IsImm();
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return rc->IsImm(*preg);
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}
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else if (std::holds_alternative<u32>(contents))
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{
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@ -149,7 +149,7 @@ s32 RCOpArg::SImm32() const
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{
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if (const preg_t* preg = std::get_if<preg_t>(&contents))
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{
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return rc->R(*preg).SImm32();
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return rc->SImm32(*preg);
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}
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else if (const u32* imm = std::get_if<u32>(&contents))
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{
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@ -163,7 +163,7 @@ u32 RCOpArg::Imm32() const
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{
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if (const preg_t* preg = std::get_if<preg_t>(&contents))
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{
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return rc->R(*preg).Imm32();
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return rc->Imm32(*preg);
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}
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else if (const u32* imm = std::get_if<u32>(&contents))
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{
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@ -297,25 +297,16 @@ bool RegCache::SanityCheck() const
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{
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for (size_t i = 0; i < m_regs.size(); i++)
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{
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switch (m_regs[i].GetLocationType())
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{
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case PPCCachedReg::LocationType::Default:
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case PPCCachedReg::LocationType::Discarded:
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case PPCCachedReg::LocationType::SpeculativeImmediate:
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case PPCCachedReg::LocationType::Immediate:
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break;
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case PPCCachedReg::LocationType::Bound:
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if (m_regs[i].IsInHostRegister())
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{
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if (m_regs[i].IsLocked() || m_regs[i].IsRevertable())
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return false;
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Gen::X64Reg xr = m_regs[i].Location()->GetSimpleReg();
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Gen::X64Reg xr = m_regs[i].GetHostRegister();
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if (m_xregs[xr].IsLocked())
|
||||
return false;
|
||||
if (m_xregs[xr].Contents() != i)
|
||||
return false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
return true;
|
||||
|
|
@ -381,13 +372,7 @@ void RegCache::Discard(BitSet32 pregs)
|
|||
ASSERT_MSG(DYNA_REC, !m_regs[i].IsRevertable(), "Register transaction is in progress for {}!",
|
||||
i);
|
||||
|
||||
if (m_regs[i].IsBound())
|
||||
{
|
||||
X64Reg xr = RX(i);
|
||||
m_xregs[xr].Unbind();
|
||||
}
|
||||
|
||||
m_regs[i].SetDiscarded();
|
||||
DiscardRegister(i);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -405,24 +390,7 @@ void RegCache::Flush(BitSet32 pregs)
|
|||
ASSERT_MSG(DYNA_REC, !m_regs[i].IsRevertable(), "Register transaction is in progress for {}!",
|
||||
i);
|
||||
|
||||
switch (m_regs[i].GetLocationType())
|
||||
{
|
||||
case PPCCachedReg::LocationType::Default:
|
||||
break;
|
||||
case PPCCachedReg::LocationType::Discarded:
|
||||
ASSERT_MSG(DYNA_REC, false, "Attempted to flush discarded PPC reg {}", i);
|
||||
break;
|
||||
case PPCCachedReg::LocationType::SpeculativeImmediate:
|
||||
// We can have a cached value without a host register through speculative constants.
|
||||
// It must be cleared when flushing, otherwise it may be out of sync with PPCSTATE,
|
||||
// if PPCSTATE is modified externally (e.g. fallback to interpreter).
|
||||
m_regs[i].SetFlushed();
|
||||
break;
|
||||
case PPCCachedReg::LocationType::Bound:
|
||||
case PPCCachedReg::LocationType::Immediate:
|
||||
StoreFromRegister(i);
|
||||
break;
|
||||
}
|
||||
StoreFromRegister(i);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -430,9 +398,9 @@ void RegCache::Reset(BitSet32 pregs)
|
|||
{
|
||||
for (preg_t i : pregs)
|
||||
{
|
||||
ASSERT_MSG(DYNA_REC, !m_regs[i].IsAway(),
|
||||
ASSERT_MSG(DYNA_REC, !m_regs[i].IsInHostRegister(),
|
||||
"Attempted to reset a loaded register (did you mean to flush it?)");
|
||||
m_regs[i].SetFlushed();
|
||||
m_regs[i].SetFlushed(false);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -469,7 +437,7 @@ void RegCache::PreloadRegisters(BitSet32 to_preload)
|
|||
{
|
||||
if (NumFreeRegisters() < 2)
|
||||
return;
|
||||
if (!R(preg).IsImm())
|
||||
if (!IsImm(preg))
|
||||
BindToRegister(preg, true, false);
|
||||
}
|
||||
}
|
||||
|
|
@ -496,51 +464,51 @@ void RegCache::FlushX(X64Reg reg)
|
|||
}
|
||||
}
|
||||
|
||||
void RegCache::DiscardRegContentsIfCached(preg_t preg)
|
||||
void RegCache::DiscardRegister(preg_t preg)
|
||||
{
|
||||
if (m_regs[preg].IsBound())
|
||||
if (m_regs[preg].IsInHostRegister())
|
||||
{
|
||||
X64Reg xr = m_regs[preg].Location()->GetSimpleReg();
|
||||
X64Reg xr = m_regs[preg].GetHostRegister();
|
||||
m_xregs[xr].Unbind();
|
||||
m_regs[preg].SetFlushed();
|
||||
}
|
||||
|
||||
m_regs[preg].SetDiscarded();
|
||||
}
|
||||
|
||||
void RegCache::BindToRegister(preg_t i, bool doLoad, bool makeDirty)
|
||||
{
|
||||
if (!m_regs[i].IsBound())
|
||||
if (!m_regs[i].IsInHostRegister())
|
||||
{
|
||||
X64Reg xr = GetFreeXReg();
|
||||
|
||||
ASSERT_MSG(DYNA_REC, !m_xregs[xr].IsDirty(), "Xreg {} already dirty", Common::ToUnderlying(xr));
|
||||
ASSERT_MSG(DYNA_REC, !m_xregs[xr].IsLocked(), "GetFreeXReg returned locked register");
|
||||
ASSERT_MSG(DYNA_REC, !m_regs[i].IsRevertable(), "Invalid transaction state");
|
||||
|
||||
m_xregs[xr].SetBoundTo(i, makeDirty || m_regs[i].IsAway());
|
||||
m_xregs[xr].SetBoundTo(i);
|
||||
|
||||
if (doLoad)
|
||||
{
|
||||
ASSERT_MSG(DYNA_REC, !m_regs[i].IsDiscarded(), "Attempted to load a discarded value");
|
||||
LoadRegister(i, xr);
|
||||
}
|
||||
|
||||
ASSERT_MSG(DYNA_REC,
|
||||
std::none_of(m_regs.begin(), m_regs.end(),
|
||||
[xr](const auto& r) {
|
||||
return r.Location().has_value() && r.Location()->IsSimpleReg(xr);
|
||||
return r.IsInHostRegister() && r.GetHostRegister() == xr;
|
||||
}),
|
||||
"Xreg {} already bound", Common::ToUnderlying(xr));
|
||||
|
||||
m_regs[i].SetBoundTo(xr);
|
||||
m_regs[i].SetInHostRegister(xr, makeDirty);
|
||||
}
|
||||
else
|
||||
{
|
||||
// reg location must be simplereg; memory locations
|
||||
// and immediates are taken care of above.
|
||||
if (makeDirty)
|
||||
m_xregs[RX(i)].MakeDirty();
|
||||
m_regs[i].SetDirty();
|
||||
}
|
||||
|
||||
if (makeDirty)
|
||||
DiscardImm(i);
|
||||
|
||||
ASSERT_MSG(DYNA_REC, !m_xregs[RX(i)].IsLocked(),
|
||||
"WTF, this reg ({} -> {}) should have been flushed", i, Common::ToUnderlying(RX(i)));
|
||||
}
|
||||
|
|
@ -550,31 +518,13 @@ void RegCache::StoreFromRegister(preg_t i, FlushMode mode)
|
|||
// When a transaction is in progress, allowing the store would overwrite the old value.
|
||||
ASSERT_MSG(DYNA_REC, !m_regs[i].IsRevertable(), "Register transaction on {} is in progress!", i);
|
||||
|
||||
bool doStore = false;
|
||||
|
||||
switch (m_regs[i].GetLocationType())
|
||||
{
|
||||
case PPCCachedReg::LocationType::Default:
|
||||
case PPCCachedReg::LocationType::Discarded:
|
||||
case PPCCachedReg::LocationType::SpeculativeImmediate:
|
||||
return;
|
||||
case PPCCachedReg::LocationType::Bound:
|
||||
{
|
||||
X64Reg xr = RX(i);
|
||||
doStore = m_xregs[xr].IsDirty();
|
||||
if (mode == FlushMode::Full)
|
||||
m_xregs[xr].Unbind();
|
||||
break;
|
||||
}
|
||||
case PPCCachedReg::LocationType::Immediate:
|
||||
doStore = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if (doStore)
|
||||
if (!m_regs[i].IsInDefaultLocation())
|
||||
StoreRegister(i, GetDefaultLocation(i));
|
||||
if (mode == FlushMode::Full)
|
||||
m_regs[i].SetFlushed();
|
||||
|
||||
if (mode == FlushMode::Full && m_regs[i].IsInHostRegister())
|
||||
m_xregs[m_regs[i].GetHostRegister()].Unbind();
|
||||
|
||||
m_regs[i].SetFlushed(mode != FlushMode::Full);
|
||||
}
|
||||
|
||||
X64Reg RegCache::GetFreeXReg()
|
||||
|
|
@ -639,7 +589,7 @@ float RegCache::ScoreRegister(X64Reg xreg) const
|
|||
// bias a bit against dirty registers. Testing shows that a bias of 2 seems roughly
|
||||
// right: 3 causes too many extra clobbers, while 1 saves very few clobbers relative
|
||||
// to the number of extra stores it causes.
|
||||
if (m_xregs[xreg].IsDirty())
|
||||
if (!m_regs[preg].IsInDefaultLocation())
|
||||
score += 2;
|
||||
|
||||
// If the register isn't actually needed in a physical register for a later instruction,
|
||||
|
|
@ -660,16 +610,10 @@ float RegCache::ScoreRegister(X64Reg xreg) const
|
|||
return score;
|
||||
}
|
||||
|
||||
const OpArg& RegCache::R(preg_t preg) const
|
||||
{
|
||||
ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - {}", preg);
|
||||
return m_regs[preg].Location().value();
|
||||
}
|
||||
|
||||
X64Reg RegCache::RX(preg_t preg) const
|
||||
{
|
||||
ASSERT_MSG(DYNA_REC, m_regs[preg].IsBound(), "Unbound register - {}", preg);
|
||||
return m_regs[preg].Location()->GetSimpleReg();
|
||||
ASSERT_MSG(DYNA_REC, m_regs[preg].IsInHostRegister(), "Not in host register - {}", preg);
|
||||
return m_regs[preg].GetHostRegister();
|
||||
}
|
||||
|
||||
void RegCache::Lock(preg_t preg)
|
||||
|
|
@ -725,29 +669,23 @@ void RegCache::Realize(preg_t preg)
|
|||
return;
|
||||
}
|
||||
|
||||
switch (m_regs[preg].GetLocationType())
|
||||
if (IsImm(preg))
|
||||
{
|
||||
case PPCCachedReg::LocationType::Default:
|
||||
if (kill_mem)
|
||||
{
|
||||
do_bind();
|
||||
return;
|
||||
}
|
||||
m_constraints[preg].Realized(RCConstraint::RealizedLoc::Mem);
|
||||
return;
|
||||
case PPCCachedReg::LocationType::Discarded:
|
||||
case PPCCachedReg::LocationType::Bound:
|
||||
do_bind();
|
||||
return;
|
||||
case PPCCachedReg::LocationType::Immediate:
|
||||
case PPCCachedReg::LocationType::SpeculativeImmediate:
|
||||
if (dirty || kill_imm)
|
||||
{
|
||||
do_bind();
|
||||
return;
|
||||
}
|
||||
m_constraints[preg].Realized(RCConstraint::RealizedLoc::Imm);
|
||||
break;
|
||||
else
|
||||
m_constraints[preg].Realized(RCConstraint::RealizedLoc::Imm);
|
||||
}
|
||||
else if (!m_regs[preg].IsInHostRegister())
|
||||
{
|
||||
if (kill_mem)
|
||||
do_bind();
|
||||
else
|
||||
m_constraints[preg].Realized(RCConstraint::RealizedLoc::Mem);
|
||||
}
|
||||
else
|
||||
{
|
||||
do_bind();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -151,12 +151,14 @@ public:
|
|||
bool IsImm(Args... pregs) const
|
||||
{
|
||||
static_assert(sizeof...(pregs) > 0);
|
||||
return (R(pregs).IsImm() && ...);
|
||||
return (IsImm(preg_t(pregs)) && ...);
|
||||
}
|
||||
u32 Imm32(preg_t preg) const { return R(preg).Imm32(); }
|
||||
s32 SImm32(preg_t preg) const { return R(preg).SImm32(); }
|
||||
|
||||
bool IsBound(preg_t preg) const { return m_regs[preg].IsBound(); }
|
||||
virtual bool IsImm(preg_t preg) const = 0;
|
||||
virtual u32 Imm32(preg_t preg) const = 0;
|
||||
virtual s32 SImm32(preg_t preg) const = 0;
|
||||
|
||||
bool IsBound(preg_t preg) const { return m_regs[preg].IsInHostRegister(); }
|
||||
|
||||
RCOpArg Use(preg_t preg, RCMode mode);
|
||||
RCOpArg UseNoImm(preg_t preg, RCMode mode);
|
||||
|
|
@ -186,6 +188,7 @@ protected:
|
|||
virtual Gen::OpArg GetDefaultLocation(preg_t preg) const = 0;
|
||||
virtual void StoreRegister(preg_t preg, const Gen::OpArg& new_loc) = 0;
|
||||
virtual void LoadRegister(preg_t preg, Gen::X64Reg new_loc) = 0;
|
||||
virtual void DiscardImm(preg_t preg) = 0;
|
||||
|
||||
virtual std::span<const Gen::X64Reg> GetAllocationOrder() const = 0;
|
||||
|
||||
|
|
@ -193,7 +196,7 @@ protected:
|
|||
virtual BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const = 0;
|
||||
|
||||
void FlushX(Gen::X64Reg reg);
|
||||
void DiscardRegContentsIfCached(preg_t preg);
|
||||
void DiscardRegister(preg_t preg);
|
||||
void BindToRegister(preg_t preg, bool doLoad = true, bool makeDirty = true);
|
||||
void StoreFromRegister(preg_t preg, FlushMode mode = FlushMode::Full);
|
||||
|
||||
|
|
@ -202,7 +205,7 @@ protected:
|
|||
int NumFreeRegisters() const;
|
||||
float ScoreRegister(Gen::X64Reg xreg) const;
|
||||
|
||||
const Gen::OpArg& R(preg_t preg) const;
|
||||
virtual Gen::OpArg R(preg_t preg) const = 0;
|
||||
Gen::X64Reg RX(preg_t preg) const;
|
||||
|
||||
void Lock(preg_t preg);
|
||||
|
|
|
|||
|
|
@ -65,6 +65,8 @@ public:
|
|||
m_gpr_values[gpr] = value;
|
||||
}
|
||||
|
||||
void ClearGPR(size_t gpr) { m_gpr_values_known[gpr] = false; }
|
||||
|
||||
void Clear() { m_gpr_values_known = BitSet32{}; }
|
||||
|
||||
private:
|
||||
|
|
|
|||
Loading…
Reference in New Issue