Merge pull request #7488 from MerryMage/fp_tri_op
Jit_FloatingPoint: Make fp_tri_op a local lambda
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22c63433a2
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@ -119,10 +119,6 @@ public:
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void regimmop(int d, int a, bool binary, u32 value, Operation doop,
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void (Gen::XEmitter::*op)(int, const Gen::OpArg&, const Gen::OpArg&),
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bool Rc = false, bool carry = false);
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Gen::X64Reg fp_tri_op(int d, int a, int b, bool reversible, bool single,
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void (Gen::XEmitter::*avxOp)(Gen::X64Reg, Gen::X64Reg, const Gen::OpArg&),
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void (Gen::XEmitter::*sseOp)(Gen::X64Reg, const Gen::OpArg&), bool packed,
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bool preserve_inputs, bool roundRHS = false);
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void FloatCompare(UGeckoInstruction inst, bool upper = false);
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void UpdateMXCSR();
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@ -26,34 +26,6 @@ alignas(16) static const u64 psAbsMask2[2] = {0x7FFFFFFFFFFFFFFFULL, 0x7FFFFFFFF
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alignas(16) static const u64 psGeneratedQNaN[2] = {0x7FF8000000000000ULL, 0x7FF8000000000000ULL};
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alignas(16) static const double half_qnan_and_s32_max[2] = {0x7FFFFFFF, -0x80000};
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X64Reg Jit64::fp_tri_op(int d, int a, int b, bool reversible, bool single,
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void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&),
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void (XEmitter::*sseOp)(X64Reg, const OpArg&), bool packed,
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bool preserve_inputs, bool roundRHS)
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{
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fpr.Lock(d, a, b);
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fpr.BindToRegister(d, d == a || d == b || !single);
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X64Reg dest = preserve_inputs ? XMM1 : fpr.RX(d);
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if (roundRHS)
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{
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if (d == a && !preserve_inputs)
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{
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Force25BitPrecision(XMM0, fpr.R(b), XMM1);
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(this->*sseOp)(fpr.RX(d), R(XMM0));
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}
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else
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{
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Force25BitPrecision(dest, fpr.R(b), XMM0);
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(this->*sseOp)(dest, fpr.R(a));
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}
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}
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else
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{
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avx_op(avxOp, sseOp, dest, fpr.R(a), fpr.R(b), packed, reversible);
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}
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return dest;
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}
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// We can avoid calculating FPRF if it's not needed; every float operation resets it, so
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// if it's going to be clobbered in a future instruction before being read, we can just
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// not calculate it.
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@ -200,34 +172,58 @@ void Jit64::fp_arith(UGeckoInstruction inst)
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bool round_input = single && !js.op->fprIsSingle[inst.FC];
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bool preserve_inputs = SConfig::GetInstance().bAccurateNaNs;
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X64Reg dest = INVALID_REG;
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const auto fp_tri_op = [&](int d, int a, int b, bool reversible,
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void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&),
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void (XEmitter::*sseOp)(X64Reg, const OpArg&), bool roundRHS = false) {
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fpr.Lock(d, a, b);
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fpr.BindToRegister(d, d == a || d == b || !single);
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X64Reg dest = preserve_inputs ? XMM1 : fpr.RX(d);
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if (roundRHS)
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{
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if (d == a && !preserve_inputs)
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{
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Force25BitPrecision(XMM0, fpr.R(b), XMM1);
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(this->*sseOp)(fpr.RX(d), R(XMM0));
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}
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else
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{
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Force25BitPrecision(dest, fpr.R(b), XMM0);
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(this->*sseOp)(dest, fpr.R(a));
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}
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}
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else
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{
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avx_op(avxOp, sseOp, dest, fpr.R(a), fpr.R(b), packed, reversible);
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}
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HandleNaNs(inst, fpr.RX(d), dest);
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if (single)
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ForceSinglePrecision(fpr.RX(d), fpr.R(d), packed, true);
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SetFPRFIfNeeded(fpr.RX(d));
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fpr.UnlockAll();
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};
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switch (inst.SUBOP5)
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{
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case 18:
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dest = fp_tri_op(d, a, b, false, single, packed ? &XEmitter::VDIVPD : &XEmitter::VDIVSD,
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packed ? &XEmitter::DIVPD : &XEmitter::DIVSD, packed, preserve_inputs);
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fp_tri_op(d, a, b, false, packed ? &XEmitter::VDIVPD : &XEmitter::VDIVSD,
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packed ? &XEmitter::DIVPD : &XEmitter::DIVSD);
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break;
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case 20:
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dest = fp_tri_op(d, a, b, false, single, packed ? &XEmitter::VSUBPD : &XEmitter::VSUBSD,
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packed ? &XEmitter::SUBPD : &XEmitter::SUBSD, packed, preserve_inputs);
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fp_tri_op(d, a, b, false, packed ? &XEmitter::VSUBPD : &XEmitter::VSUBSD,
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packed ? &XEmitter::SUBPD : &XEmitter::SUBSD);
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break;
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case 21:
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dest = fp_tri_op(d, a, b, true, single, packed ? &XEmitter::VADDPD : &XEmitter::VADDSD,
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packed ? &XEmitter::ADDPD : &XEmitter::ADDSD, packed, preserve_inputs);
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fp_tri_op(d, a, b, true, packed ? &XEmitter::VADDPD : &XEmitter::VADDSD,
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packed ? &XEmitter::ADDPD : &XEmitter::ADDSD);
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break;
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case 25:
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dest = fp_tri_op(d, a, c, true, single, packed ? &XEmitter::VMULPD : &XEmitter::VMULSD,
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packed ? &XEmitter::MULPD : &XEmitter::MULSD, packed, preserve_inputs,
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round_input);
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fp_tri_op(d, a, c, true, packed ? &XEmitter::VMULPD : &XEmitter::VMULSD,
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packed ? &XEmitter::MULPD : &XEmitter::MULSD, round_input);
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break;
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default:
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ASSERT_MSG(DYNA_REC, 0, "fp_arith WTF!!!");
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}
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HandleNaNs(inst, fpr.RX(d), dest);
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if (single)
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ForceSinglePrecision(fpr.RX(d), fpr.R(d), packed, true);
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SetFPRFIfNeeded(fpr.RX(d));
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fpr.UnlockAll();
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}
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void Jit64::fmaddXX(UGeckoInstruction inst)
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