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Jit_Integer: srwx

This commit is contained in:
MerryMage 2018-10-15 21:01:11 +01:00
parent 4a97f31aa2
commit 22600b33ee
1 changed files with 13 additions and 15 deletions
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28
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -1755,29 +1755,27 @@ void Jit64::srwx(UGeckoInstruction inst)
int b = inst.RB; int b = inst.RB;
int s = inst.RS; int s = inst.RS;
if (gpr.R(b).IsImm() && gpr.R(s).IsImm()) if (gpr.IsImm(b, s))
{ {
u32 amount = gpr.R(b).Imm32(); u32 amount = gpr.Imm32(b);
gpr.SetImmediate32(a, (amount & 0x20) ? 0 : (gpr.R(s).Imm32() >> (amount & 0x1f))); gpr.SetImmediate32(a, (amount & 0x20) ? 0 : (gpr.Imm32(s) >> (amount & 0x1f)));
} }
else else
{ {
// no register choice RCX64Reg ecx = gpr.Scratch(ECX); // no register choice
gpr.FlushLockX(ECX); RCX64Reg Ra = gpr.Bind(a, RCMode::Write);
gpr.Lock(a, b, s); RCOpArg Rb = gpr.Use(b, RCMode::Read);
MOV(32, R(ECX), gpr.R(b)); RCOpArg Rs = gpr.Use(s, RCMode::Read);
gpr.BindToRegister(a, a == s, true); RegCache::Realize(ecx, Ra, Rb, Rs);
MOV(32, ecx, Rb);
if (a != s) if (a != s)
{ MOV(32, Ra, Rs);
MOV(32, gpr.R(a), gpr.R(s)); SHR(64, Ra, ecx);
}
SHR(64, gpr.R(a), R(ECX));
} }
// Shift of 0 doesn't update flags, so we need to test just in case // Shift of 0 doesn't update flags, so we need to test just in case
if (inst.Rc) if (inst.Rc)
ComputeRC(gpr.R(a)); ComputeRC(a);
gpr.UnlockAll();
gpr.UnlockAllX();
} }
void Jit64::slwx(UGeckoInstruction inst) void Jit64::slwx(UGeckoInstruction inst)