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Merge pull request #4705 from lioncash/mmu 

MMU: Change '0' literals to 'false' in IsOptimizableGatherPipeWrite
This commit is contained in:
Matthew Parlane 2017-01-22 16:24:49 +13:00 committed by GitHub
parent 507715f316 0dee9bc4f0
commit 2252b7a355
1 changed files with 3 additions and 3 deletions
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6
Source/Core/Core/PowerPC/MMU.cpp
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@ -771,16 +771,16 @@ u32 IsOptimizableMMIOAccess(u32 address, u32 accessSize)
bool IsOptimizableGatherPipeWrite(u32 address) bool IsOptimizableGatherPipeWrite(u32 address)
{ {
if (PowerPC::memchecks.HasAny()) if (PowerPC::memchecks.HasAny())
return 0; return false;
if (!UReg_MSR(MSR).DR) if (!UReg_MSR(MSR).DR)
return 0; return false;
// Translate address, only check BAT mapping. // Translate address, only check BAT mapping.
// If we also optimize for TLB mappings, we'd have to clear the // If we also optimize for TLB mappings, we'd have to clear the
// JitCache on each TLB invalidation. // JitCache on each TLB invalidation.
if (!TranslateBatAddess(dbat_table, &address)) if (!TranslateBatAddess(dbat_table, &address))
return 0; return false;
// Check whether the translated address equals the address in WPAR. // Check whether the translated address equals the address in WPAR.
return address == 0x0C008000; return address == 0x0C008000;