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For idle loops, don't explicitly call CoreTiming::Advance. 

This is more consistent with the way Dolphin behaves with idle skipping off.
This commit is contained in:
magumagu 2015-01-11 19:06:27 -08:00
parent 7105e5a8f0
commit 213eb730d0
7 changed files with 4 additions and 17 deletions
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2
Source/Core/Core/CoreTiming.cpp
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@ -479,8 +479,6 @@ void Idle()
idledCycles += DowncountToCycles(PowerPC::ppcState.downcount); idledCycles += DowncountToCycles(PowerPC::ppcState.downcount);
PowerPC::ppcState.downcount = 0; PowerPC::ppcState.downcount = 0;
Advance();
} }
std::string GetScheduledEventsSummary() std::string GetScheduledEventsSummary()

2
Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
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@ -134,7 +134,7 @@ void Jit64::lXXx(UGeckoInstruction inst)
BitSet32 registersInUse = CallerSavedRegistersInUse(); BitSet32 registersInUse = CallerSavedRegistersInUse();
ABI_PushRegistersAndAdjustStack(registersInUse, 0); ABI_PushRegistersAndAdjustStack(registersInUse, 0);
ABI_CallFunctionC((void *)&PowerPC::OnIdle, PowerPC::ppcState.gpr[a] + (s32)(s16)inst.SIMM_16); ABI_CallFunction((void *)&PowerPC::OnIdle);
ABI_PopRegistersAndAdjustStack(registersInUse, 0); ABI_PopRegistersAndAdjustStack(registersInUse, 0);

2
Source/Core/Core/PowerPC/Jit64IL/IR_X86.cpp
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@ -2088,7 +2088,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, u32 exitAddress)
FixupBranch noidle = Jit->J_CC(CC_NZ); FixupBranch noidle = Jit->J_CC(CC_NZ);
RI.Jit->Cleanup(); // is it needed? RI.Jit->Cleanup(); // is it needed?
Jit->ABI_CallFunction((void *)&PowerPC::OnIdleIL); Jit->ABI_CallFunction((void *)&PowerPC::OnIdle);
Jit->MOV(32, PPCSTATE(pc), Imm32(ibuild->GetImmValue( getOp2(I) ))); Jit->MOV(32, PPCSTATE(pc), Imm32(ibuild->GetImmValue( getOp2(I) )));
Jit->WriteExceptionExit(); Jit->WriteExceptionExit();

1
Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStore.cpp
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@ -464,7 +464,6 @@ void JitArm::lXX(UGeckoInstruction inst)
rA = gpr.GetReg(); rA = gpr.GetReg();
MOVI2R(rA, (u32)&PowerPC::OnIdle); MOVI2R(rA, (u32)&PowerPC::OnIdle);
MOVI2R(R0, PowerPC::ppcState.gpr[a] + (s32)(s16)inst.SIMM_16);
BL(rA); BL(rA);
gpr.Unlock(rA); gpr.Unlock(rA);

1
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
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@ -344,7 +344,6 @@ void JitArm64::lXX(UGeckoInstruction inst)
ARM64Reg XA = EncodeRegTo64(WA); ARM64Reg XA = EncodeRegTo64(WA);
MOVI2R(XA, (u64)&PowerPC::OnIdle); MOVI2R(XA, (u64)&PowerPC::OnIdle);
MOVI2R(W0, PowerPC::ppcState.gpr[a] + (s32)(s16)inst.SIMM_16);
BLR(XA); BLR(XA);
gpr.Unlock(WA); gpr.Unlock(WA);

10
Source/Core/Core/PowerPC/PowerPC.cpp
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@ -510,15 +510,7 @@ void CheckBreakPoints()
} }
} }
void OnIdle(u32 _uThreadAddr) void OnIdle()
{
u32 nextThread = Memory::Read_U32(_uThreadAddr);
//do idle skipping
if (nextThread == 0)
CoreTiming::Idle();
}
void OnIdleIL()
{ {
CoreTiming::Idle(); CoreTiming::Idle();
} }

3
Source/Core/Core/PowerPC/PowerPC.h
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@ -153,8 +153,7 @@ volatile CPUState *GetStatePtr(); // this oddity is here instead of an extern d
u32 CompactCR(); u32 CompactCR();
void ExpandCR(u32 cr); void ExpandCR(u32 cr);
void OnIdle(u32 _uThreadAddr); void OnIdle();
void OnIdleIL();
void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst); void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);