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JitArm64: Replace REG_IS_LOADED with REG_LOWER_PAIR

This commit is contained in:
degasus 2016-02-21 10:42:11 +01:00
parent c30a66b2d5
commit 2112d8dfda
4 changed files with 14 additions and 17 deletions
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21
Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp
View File

@ -61,7 +61,7 @@ void JitArm64::fp_arith(UGeckoInstruction inst)
}
else
{
RegType type = (inputs_are_singles && single) ? REG_IS_LOADED_SINGLE : REG_IS_LOADED;
RegType type = (inputs_are_singles && single) ? REG_LOWER_PAIR_SINGLE : REG_LOWER_PAIR;
RegType type_out = single ? (inputs_are_singles ? REG_DUP_SINGLE : REG_DUP) : REG_LOWER_PAIR;
ARM64Reg (*reg_encoder)(ARM64Reg) = (inputs_are_singles && single) ? EncodeRegToSingle : EncodeRegToDouble;
@ -128,12 +128,11 @@ void JitArm64::fp_logic(UGeckoInstruction inst)
}
else
{
RegType type = single ? REG_IS_LOADED_SINGLE : REG_IS_LOADED;
RegType type2 = single ? REG_LOWER_PAIR_SINGLE : REG_LOWER_PAIR;
RegType type = single ? REG_LOWER_PAIR_SINGLE : REG_LOWER_PAIR;
ARM64Reg (*reg_encoder)(ARM64Reg) = single ? EncodeRegToSingle : EncodeRegToDouble;
ARM64Reg VB = fpr.R(b, type);
ARM64Reg VD = fpr.RW(d, type2);
ARM64Reg VD = fpr.RW(d, type);
switch (op10)
{
@ -155,9 +154,9 @@ void JitArm64::fselx(UGeckoInstruction inst)
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
ARM64Reg VA = fpr.R(a, REG_IS_LOADED);
ARM64Reg VB = fpr.R(b, REG_IS_LOADED);
ARM64Reg VC = fpr.R(c, REG_IS_LOADED);
ARM64Reg VA = fpr.R(a, REG_LOWER_PAIR);
ARM64Reg VB = fpr.R(b, REG_LOWER_PAIR);
ARM64Reg VC = fpr.R(c, REG_LOWER_PAIR);
ARM64Reg VD = fpr.RW(d);
m_float_emit.FCMPE(EncodeRegToDouble(VA));
@ -176,7 +175,7 @@ void JitArm64::frspx(UGeckoInstruction inst)
if (fpr.IsSingle(b, true))
{
// Source is already in single precision, so no need to do anything but to copy to PSR1.
ARM64Reg VB = fpr.R(b, REG_IS_LOADED_SINGLE);
ARM64Reg VB = fpr.R(b, REG_LOWER_PAIR_SINGLE);
ARM64Reg VD = fpr.RW(d, REG_DUP_SINGLE);
if (b != d)
@ -184,7 +183,7 @@ void JitArm64::frspx(UGeckoInstruction inst)
}
else
{
ARM64Reg VB = fpr.R(b, REG_IS_LOADED);
ARM64Reg VB = fpr.R(b, REG_LOWER_PAIR);
ARM64Reg VD = fpr.RW(d, REG_DUP_SINGLE);
m_float_emit.FCVT(32, 64, EncodeRegToDouble(VD), EncodeRegToDouble(VB));
@ -201,7 +200,7 @@ void JitArm64::fcmpX(UGeckoInstruction inst)
int crf = inst.CRFD;
bool singles = fpr.IsSingle(a, true) && fpr.IsSingle(b, true);
RegType type = singles ? REG_IS_LOADED_SINGLE : REG_IS_LOADED;
RegType type = singles ? REG_LOWER_PAIR_SINGLE : REG_LOWER_PAIR;
ARM64Reg (*reg_encoder)(ARM64Reg) = singles ? EncodeRegToSingle : EncodeRegToDouble;
ARM64Reg VA = reg_encoder(fpr.R(a, type));
@ -266,7 +265,7 @@ void JitArm64::fctiwzx(UGeckoInstruction inst)
u32 b = inst.FB, d = inst.FD;
ARM64Reg VB = fpr.R(b, REG_IS_LOADED);
ARM64Reg VB = fpr.R(b, REG_LOWER_PAIR);
ARM64Reg VD = fpr.RW(d);
ARM64Reg V0 = fpr.GetReg();

2
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
View File

@ -272,7 +272,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
bool single = (flags & BackPatchInfo::FLAG_SIZE_F32) && fpr.IsSingle(inst.FS, true);
ARM64Reg V0 = fpr.R(inst.FS, single ? REG_IS_LOADED_SINGLE : REG_IS_LOADED);
ARM64Reg V0 = fpr.R(inst.FS, single ? REG_LOWER_PAIR_SINGLE : REG_LOWER_PAIR);
if (single)
{

6
Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.cpp
View File

@ -314,7 +314,7 @@ ARM64Reg Arm64FPRCache::R(u32 preg, RegType type)
case REG_REG_SINGLE:
{
// We're asked for singles, so just return the register.
if (type == REG_REG_SINGLE || type == REG_IS_LOADED_SINGLE)
if (type == REG_REG_SINGLE || type == REG_LOWER_PAIR_SINGLE)
return host_reg;
// Else convert this register back to doubles.
@ -330,7 +330,7 @@ ARM64Reg Arm64FPRCache::R(u32 preg, RegType type)
case REG_LOWER_PAIR_SINGLE:
{
// We're asked for the lower single, so just return the register.
if (type == REG_IS_LOADED_SINGLE)
if (type == REG_LOWER_PAIR_SINGLE)
return host_reg;
// Else convert this register back to a double.
@ -356,7 +356,7 @@ ARM64Reg Arm64FPRCache::R(u32 preg, RegType type)
}
case REG_DUP_SINGLE:
{
if (type == REG_IS_LOADED_SINGLE)
if (type == REG_LOWER_PAIR_SINGLE)
return host_reg;
if (type == REG_REG_SINGLE)

2
Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
View File

@ -22,11 +22,9 @@ enum RegType
REG_IMM, // Reg is really a IMM
REG_LOWER_PAIR, // Only the lower pair of a paired register
REG_DUP, // The lower reg is the same as the upper one (physical upper doesn't actually have the duplicated value)
REG_IS_LOADED, // We don't care what type it is, as long as the lower 64bits are loaded
REG_REG_SINGLE, // Both registers are loaded as single
REG_LOWER_PAIR_SINGLE, // Only the lower pair of a paired register, as single
REG_DUP_SINGLE, // The lower one contains both registers, as single
REG_IS_LOADED_SINGLE, // We only want to access the lower one as single
};
enum FlushMode