Revert merges of aram-dma-fixes and memcard-delay
These merges, while in theory improving emulation accuracy, cause issues in other parts of the emulator based on invalid assumptions. memcard-delay fixed some of these issues in the EXI memcard code, but several other problems still exist and I don't have the time to debug that right now.
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1ffb9ce47e
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@ -436,6 +436,10 @@ void Write16(const u16 _Value, const u32 _Address)
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if (tmpControl.ARAM) g_dspState.DSPControl.ARAM = 0;
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if (tmpControl.DSP) g_dspState.DSPControl.DSP = 0;
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// Tracking DMAState fixes Knockout Kings 2003 in DSP HLE mode
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if (GetDSPEmulator()->IsLLE())
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g_dspState.DSPControl.DMAState = 0; // keep g_ARAM DMA State zero
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// unknown
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g_dspState.DSPControl.unk3 = tmpControl.unk3;
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g_dspState.DSPControl.pad = tmpControl.pad;
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@ -697,9 +701,9 @@ void Do_ARAM_DMA()
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// seems like a good estimate
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CoreTiming::ScheduleEvent_Threadsafe(g_arDMA.Cnt.count >> 1, et_GenerateDSPInterrupt, INT_ARAM | (1<<16));
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// Set the "DMA in progress" flag. It will be cleared when the interrupt will
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// be triggered, after the simulated delay.
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g_dspState.DSPControl.DMAState = 1;
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// Emulating the DMA wait time fixes Knockout Kings 2003 in DSP HLE mode
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if (!GetDSPEmulator()->IsLLE())
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g_dspState.DSPControl.DMAState = 1;
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// Real hardware DMAs in 32byte chunks, but we can get by with 8byte chunks
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if (g_arDMA.Cnt.dir)
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@ -47,22 +47,13 @@ void CEXIMemoryCard::FlushCallback(u64 userdata, int cyclesLate)
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pThis->Flush();
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}
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void CEXIMemoryCard::CmdDoneCallback(u64 userdata, int cyclesLate)
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{
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int card_index = (int)userdata;
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CEXIMemoryCard* pThis = (CEXIMemoryCard*)ExpansionInterface::FindDevice(EXIDEVICE_MEMORYCARD, card_index);
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if (pThis)
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pThis->CmdDone();
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}
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CEXIMemoryCard::CEXIMemoryCard(const int index)
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: card_index(index)
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, m_bDirty(false)
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{
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m_strFilename = (card_index == 0) ? SConfig::GetInstance().m_strMemoryCardA : SConfig::GetInstance().m_strMemoryCardB;
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// we're potentially leaking events here, since there's no UnregisterEvent until emu shutdown, but I guess it's inconsequential
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et_this_card = CoreTiming::RegisterEvent((card_index == 0) ? "memcardFlushA" : "memcardFlushB", FlushCallback);
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et_cmd_done = CoreTiming::RegisterEvent((card_index == 0) ? "memcardDoneA" : "memcardDoneB", CmdDoneCallback);
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et_this_card = CoreTiming::RegisterEvent((card_index == 0) ? "memcardA" : "memcardB", FlushCallback);
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interruptSwitch = 0;
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m_bInterruptSet = 0;
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@ -184,21 +175,6 @@ bool CEXIMemoryCard::IsPresent()
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return true;
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}
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void CEXIMemoryCard::CmdDone()
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{
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status |= MC_STATUS_READY;
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status &= ~MC_STATUS_BUSY;
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m_bInterruptSet = 1;
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m_bDirty = true;
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}
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void CEXIMemoryCard::CmdDoneLater(u64 cycles)
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{
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CoreTiming::RemoveEvent(et_cmd_done);
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CoreTiming::ScheduleEvent(cycles, et_cmd_done, (u64)card_index);
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}
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void CEXIMemoryCard::SetCS(int cs)
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{
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// So that memory card won't be invalidated during flushing
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@ -222,7 +198,11 @@ void CEXIMemoryCard::SetCS(int cs)
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//???
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CmdDoneLater(5000);
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status |= MC_STATUS_READY;
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status &= ~MC_STATUS_BUSY;
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m_bInterruptSet = 1;
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m_bDirty = true;
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}
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break;
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@ -249,7 +229,11 @@ void CEXIMemoryCard::SetCS(int cs)
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address = (address & ~0x1FF) | ((address+1) & 0x1FF);
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}
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CmdDoneLater(5000);
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status |= MC_STATUS_READY;
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status &= ~MC_STATUS_BUSY;
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m_bInterruptSet = 1;
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m_bDirty = true;
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}
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// Page written to memory card, not just to buffer - let's schedule a flush 0.5b cycles into the future (1 sec)
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@ -47,18 +47,9 @@ private:
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// through the userdata parameter, so that it can then call Flush on the right card.
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static void FlushCallback(u64 userdata, int cyclesLate);
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// Scheduled when a command that required delayed end signaling is done.
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static void CmdDoneCallback(u64 userdata, int cyclesLate);
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// Flushes the memory card contents to disk.
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void Flush(bool exiting = false);
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// Signals that the command that was previously executed is now done.
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void CmdDone();
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// Variant of CmdDone which schedules an event later in the future to complete the command.
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void CmdDoneLater(u64 cycles);
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enum
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{
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cmdNintendoID = 0x00,
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@ -80,7 +71,7 @@ private:
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std::string m_strFilename;
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int card_index;
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int et_this_card, et_cmd_done;
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int et_this_card;
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//! memory card state
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// STATE_TO_SAVE
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@ -234,7 +234,6 @@ void Interpreter::mtmsr(UGeckoInstruction _inst)
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{
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// Privileged?
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MSR = m_GPR[_inst.RS];
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PowerPC::CheckExceptions();
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m_EndBlock = true;
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}
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@ -303,7 +303,6 @@ void Jit64::Cleanup()
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void Jit64::WriteExit(u32 destination, int exit_num)
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{
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Cleanup();
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SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
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//If nobody has taken care of this yet (this can be removed when all branches are done)
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@ -122,25 +122,7 @@ void Jit64::mtmsr(UGeckoInstruction inst)
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gpr.UnlockAll();
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gpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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// If some exceptions are pending and EE are now enabled, force checking
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// external exceptions when going out of mtmsr in order to execute delayed
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// interrupts as soon as possible.
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MOV(32, R(EAX), M(&MSR));
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TEST(32, R(EAX), Imm32(0x8000));
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FixupBranch eeDisabled = J_CC(CC_Z);
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MOV(32, R(EAX), M((void*)&PowerPC::ppcState.Exceptions));
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TEST(32, R(EAX), R(EAX));
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FixupBranch noExceptionsPending = J_CC(CC_Z);
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MOV(32, M(&PC), Imm32(js.compilerPC + 4));
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WriteExternalExceptionExit();
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SetJumpTarget(eeDisabled);
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SetJumpTarget(noExceptionsPending);
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WriteExit(js.compilerPC + 4, 0);
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js.firstFPInstructionFound = false;
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}
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@ -276,8 +276,8 @@ public:
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InstLoc EmitLoadMSR() {
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return FoldZeroOp(LoadMSR, 0);
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}
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InstLoc EmitStoreMSR(InstLoc val, InstLoc pc) {
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return FoldBiOp(StoreMSR, val, pc);
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InstLoc EmitStoreMSR(InstLoc val) {
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return FoldUOp(StoreMSR, val);
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}
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InstLoc EmitStoreFPRF(InstLoc value) {
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return FoldUOp(StoreFPRF, value);
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@ -994,26 +994,8 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
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break;
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}
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case StoreMSR: {
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unsigned InstLoc = ibuild->GetImmValue(getOp2(I));
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regStoreInstToConstLoc(RI, 32, getOp1(I), &MSR);
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regNormalRegClear(RI, I);
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// If some exceptions are pending and EE are now enabled, force checking
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// external exceptions when going out of mtmsr in order to execute delayed
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// interrupts as soon as possible.
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Jit->MOV(32, R(EAX), M(&MSR));
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Jit->TEST(32, R(EAX), Imm32(0x8000));
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FixupBranch eeDisabled = Jit->J_CC(CC_Z);
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Jit->MOV(32, R(EAX), M((void*)&PowerPC::ppcState.Exceptions));
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Jit->TEST(32, R(EAX), R(EAX));
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FixupBranch noExceptionsPending = Jit->J_CC(CC_Z);
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Jit->MOV(32, M(&PC), Imm32(InstLoc + 4));
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Jit->WriteExceptionExit(); // TODO: Implement WriteExternalExceptionExit for JitIL
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Jit->SetJumpTarget(eeDisabled);
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Jit->SetJumpTarget(noExceptionsPending);
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break;
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}
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case StoreGQR: {
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@ -106,7 +106,7 @@ void JitIL::mfspr(UGeckoInstruction inst)
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// --------------
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void JitIL::mtmsr(UGeckoInstruction inst)
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{
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ibuild.EmitStoreMSR(ibuild.EmitLoadGReg(inst.RS), ibuild.EmitIntConst(js.compilerPC));
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ibuild.EmitStoreMSR(ibuild.EmitLoadGReg(inst.RS));
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ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
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}
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// ==============
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