Merge pull request #2451 from degasus/master
DSP: Inline DSPControl into DSPState
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commit
1fc3c8aa02
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@ -79,16 +79,6 @@ union UARAMCount
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};
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};
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// DSPState
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struct DSPState
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{
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UDSPControl DSPControl;
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DSPState()
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{
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DSPControl.Hex = 0;
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}
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};
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// Blocks are 32 bytes.
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union UAudioDMAControl
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{
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@ -155,7 +145,7 @@ struct ARAMInfo
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// STATE_TO_SAVE
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static ARAMInfo g_ARAM;
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static DSPState g_dspState;
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static UDSPControl g_dspState;
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static AudioDMA g_audioDMA;
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static ARAM_DMA g_arDMA;
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static u32 last_mmaddr;
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@ -215,7 +205,7 @@ static int et_CompleteARAM;
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static void CompleteARAM(u64 userdata, int cyclesLate)
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{
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g_dspState.DSPControl.DMAState = 0;
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g_dspState.DMAState = 0;
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GenerateDSPInterrupt(INT_ARAM);
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}
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@ -255,8 +245,8 @@ void Init(bool hle)
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memset(&g_audioDMA, 0, sizeof(g_audioDMA));
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memset(&g_arDMA, 0, sizeof(g_arDMA));
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g_dspState.DSPControl.Hex = 0;
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g_dspState.DSPControl.DSPHalt = 1;
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g_dspState.Hex = 0;
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g_dspState.DSPHalt = 1;
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g_ARAM_Info.Hex = 0;
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g_AR_MODE = 1; // ARAM Controller has init'd
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@ -356,7 +346,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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mmio->Register(base | DSP_CONTROL,
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MMIO::ComplexRead<u16>([](u32) {
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return (g_dspState.DSPControl.Hex & ~DSP_CONTROL_MASK) |
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return (g_dspState.Hex & ~DSP_CONTROL_MASK) |
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(dsp_emulator->DSP_ReadControlRegister() & DSP_CONTROL_MASK);
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}),
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MMIO::ComplexWrite<u16>([](u32, u16 val) {
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@ -373,27 +363,27 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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}
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// Update DSP related flags
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g_dspState.DSPControl.DSPReset = tmpControl.DSPReset;
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g_dspState.DSPControl.DSPAssertInt = tmpControl.DSPAssertInt;
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g_dspState.DSPControl.DSPHalt = tmpControl.DSPHalt;
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g_dspState.DSPControl.DSPInit = tmpControl.DSPInit;
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g_dspState.DSPReset = tmpControl.DSPReset;
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g_dspState.DSPAssertInt = tmpControl.DSPAssertInt;
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g_dspState.DSPHalt = tmpControl.DSPHalt;
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g_dspState.DSPInit = tmpControl.DSPInit;
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// Interrupt (mask)
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g_dspState.DSPControl.AID_mask = tmpControl.AID_mask;
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g_dspState.DSPControl.ARAM_mask = tmpControl.ARAM_mask;
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g_dspState.DSPControl.DSP_mask = tmpControl.DSP_mask;
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g_dspState.AID_mask = tmpControl.AID_mask;
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g_dspState.ARAM_mask = tmpControl.ARAM_mask;
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g_dspState.DSP_mask = tmpControl.DSP_mask;
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// Interrupt
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if (tmpControl.AID) g_dspState.DSPControl.AID = 0;
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if (tmpControl.ARAM) g_dspState.DSPControl.ARAM = 0;
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if (tmpControl.DSP) g_dspState.DSPControl.DSP = 0;
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if (tmpControl.AID) g_dspState.AID = 0;
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if (tmpControl.ARAM) g_dspState.ARAM = 0;
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if (tmpControl.DSP) g_dspState.DSP = 0;
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// unknown
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g_dspState.DSPControl.DSPInitCode = tmpControl.DSPInitCode;
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g_dspState.DSPControl.pad = tmpControl.pad;
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if (g_dspState.DSPControl.pad != 0)
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g_dspState.DSPInitCode = tmpControl.DSPInitCode;
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g_dspState.pad = tmpControl.pad;
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if (g_dspState.pad != 0)
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{
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PanicAlert("DSPInterface (w) g_dspState.DSPControl (CC00500A) gets a value with junk in the padding %08x", val);
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PanicAlert("DSPInterface (w) g_dspState (CC00500A) gets a value with junk in the padding %08x", val);
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}
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UpdateInterrupts();
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@ -459,7 +449,7 @@ static void UpdateInterrupts()
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// to the left of it. By doing:
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// (DSP_CONTROL>>1) & DSP_CONTROL & MASK_OF_ALL_INTERRUPT_BITS
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// We can check if any of the interrupts are enabled and active, all at once.
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bool ints_set = (((g_dspState.DSPControl.Hex >> 1) & g_dspState.DSPControl.Hex & (INT_DSP | INT_ARAM | INT_AID)) != 0);
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bool ints_set = (((g_dspState.Hex >> 1) & g_dspState.Hex & (INT_DSP | INT_ARAM | INT_AID)) != 0);
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ProcessorInterface::SetInterrupt(ProcessorInterface::INT_CAUSE_DSP, ints_set);
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}
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@ -469,7 +459,7 @@ static void GenerateDSPInterrupt(u64 DSPIntType, int cyclesLate)
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// The INT_* enumeration members have values that reflect their bit positions in
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// DSP_CONTROL - we mask by (INT_DSP | INT_ARAM | INT_AID) just to ensure people
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// don't call this with bogus values.
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g_dspState.DSPControl.Hex |= (DSPIntType & (INT_DSP | INT_ARAM | INT_AID));
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g_dspState.Hex |= (DSPIntType & (INT_DSP | INT_ARAM | INT_AID));
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UpdateInterrupts();
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}
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@ -536,7 +526,7 @@ void UpdateAudioDMA()
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static void Do_ARAM_DMA()
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{
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g_dspState.DSPControl.DMAState = 1;
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g_dspState.DMAState = 1;
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// ARAM DMA transfer rate has been measured on real hw
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int ticksToTransfer = (g_arDMA.Cnt.count / 32) * 246;
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@ -678,7 +668,7 @@ u8 *GetARAMPtr()
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u64 DMAInProgress()
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{
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if (g_dspState.DSPControl.DMAState == 1)
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if (g_dspState.DMAState == 1)
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{
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return ((u64)last_mmaddr << 32 | (last_mmaddr + last_aram_dma_count));
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}
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