diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp
index 0063d499f0..61af2578bf 100644
--- a/Source/Core/Common/Arm64Emitter.cpp
+++ b/Source/Core/Common/Arm64Emitter.cpp
@@ -4131,10 +4131,15 @@ void ARM64XEmitter::ADDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 {
   u32 val;
   bool shift;
+  u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
   if (IsImmArithmetic(imm, &val, &shift))
   {
     ADD(Rd, Rn, val, shift);
   }
+  else if (IsImmArithmetic(imm_neg, &val, &shift))
+  {
+    SUB(Rd, Rn, val, shift);
+  }
   else
   {
     _assert_msg_(DYNA_REC, scratch != INVALID_REG,
@@ -4149,10 +4154,15 @@ void ARM64XEmitter::ADDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 {
   u32 val;
   bool shift;
+  u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
   if (IsImmArithmetic(imm, &val, &shift))
   {
     ADDS(Rd, Rn, val, shift);
   }
+  else if (IsImmArithmetic(imm_neg, &val, &shift))
+  {
+    SUBS(Rd, Rn, val, shift);
+  }
   else
   {
     _assert_msg_(DYNA_REC, scratch != INVALID_REG,
@@ -4167,10 +4177,15 @@ void ARM64XEmitter::SUBI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 {
   u32 val;
   bool shift;
+  u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
   if (IsImmArithmetic(imm, &val, &shift))
   {
     SUB(Rd, Rn, val, shift);
   }
+  else if (IsImmArithmetic(imm_neg, &val, &shift))
+  {
+    ADD(Rd, Rn, val, shift);
+  }
   else
   {
     _assert_msg_(DYNA_REC, scratch != INVALID_REG,
@@ -4185,10 +4200,15 @@ void ARM64XEmitter::SUBSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 {
   u32 val;
   bool shift;
+  u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
   if (IsImmArithmetic(imm, &val, &shift))
   {
     SUBS(Rd, Rn, val, shift);
   }
+  else if (IsImmArithmetic(imm_neg, &val, &shift))
+  {
+    ADDS(Rd, Rn, val, shift);
+  }
   else
   {
     _assert_msg_(DYNA_REC, scratch != INVALID_REG,