diff --git a/Source/Core/Core/PowerPC/PPCCache.cpp b/Source/Core/Core/PowerPC/PPCCache.cpp
index 551142e173..f914c0e36a 100644
--- a/Source/Core/Core/PowerPC/PPCCache.cpp
+++ b/Source/Core/Core/PowerPC/PPCCache.cpp
@@ -4,7 +4,7 @@
 
 #include "Core/PowerPC/PPCCache.h"
 
-#include <cstring>
+#include <array>
 
 #include "Common/ChunkFile.h"
 #include "Common/Swap.h"
@@ -15,8 +15,15 @@
 
 namespace PowerPC
 {
-static const u32 s_plru_mask[8] = {11, 11, 19, 19, 37, 37, 69, 69};
-static const u32 s_plru_value[8] = {11, 3, 17, 1, 36, 4, 64, 0};
+namespace
+{
+constexpr std::array<u32, 8> s_plru_mask{
+    11, 11, 19, 19, 37, 37, 69, 69,
+};
+constexpr std::array<u32, 8> s_plru_value{
+    11, 3, 17, 1, 36, 4, 64, 0,
+};
+}  // Anonymous namespace
 
 InstructionCache::InstructionCache()
 {
@@ -59,19 +66,18 @@ InstructionCache::InstructionCache()
 
 void InstructionCache::Reset()
 {
-  memset(valid, 0, sizeof(valid));
-  memset(plru, 0, sizeof(plru));
-  memset(lookup_table, 0xff, sizeof(lookup_table));
-  memset(lookup_table_ex, 0xff, sizeof(lookup_table_ex));
-  memset(lookup_table_vmem, 0xff, sizeof(lookup_table_vmem));
+  valid.fill(0);
+  plru.fill(0);
+  lookup_table.fill(0xFF);
+  lookup_table_ex.fill(0xFF);
+  lookup_table_vmem.fill(0xFF);
   JitInterface::ClearSafe();
 }
 
 void InstructionCache::Init()
 {
-  memset(data, 0, sizeof(data));
-  memset(tags, 0, sizeof(tags));
-
+  data.fill({});
+  tags.fill({});
   Reset();
 }
 
@@ -79,10 +85,12 @@ void InstructionCache::Invalidate(u32 addr)
 {
   if (!HID0.ICE)
     return;
-  // invalidates the whole set
-  u32 set = (addr >> 5) & 0x7f;
-  for (int i = 0; i < 8; i++)
-    if (valid[set] & (1 << i))
+
+  // Invalidates the whole set
+  const u32 set = (addr >> 5) & 0x7f;
+  for (size_t i = 0; i < 8; i++)
+  {
+    if (valid[set] & (1U << i))
     {
       if (tags[set][i] & (ICACHE_VMEM_BIT >> 12))
         lookup_table_vmem[((tags[set][i] << 7) | set) & 0xfffff] = 0xff;
@@ -91,6 +99,7 @@ void InstructionCache::Invalidate(u32 addr)
       else
         lookup_table[((tags[set][i] << 7) | set) & 0xfffff] = 0xff;
     }
+  }
   valid[set] = 0;
   JitInterface::InvalidateICache(addr & ~0x1f, 32, false);
 }
@@ -126,7 +135,7 @@ u32 InstructionCache::ReadInstruction(u32 addr)
     else
       t = way_from_plru[plru[set]];
     // load
-    Memory::CopyFromEmu((u8*)data[set][t], (addr & ~0x1f), 32);
+    Memory::CopyFromEmu(reinterpret_cast<u8*>(data[set][t].data()), (addr & ~0x1f), 32);
     if (valid[set] & (1 << t))
     {
       if (tags[set][t] & (ICACHE_VMEM_BIT >> 12))
diff --git a/Source/Core/Core/PowerPC/PPCCache.h b/Source/Core/Core/PowerPC/PPCCache.h
index b13dc15284..0298523131 100644
--- a/Source/Core/Core/PowerPC/PPCCache.h
+++ b/Source/Core/Core/PowerPC/PPCCache.h
@@ -4,33 +4,35 @@
 
 #pragma once
 
+#include <array>
+
 #include "Common/CommonTypes.h"
 
 class PointerWrap;
 
 namespace PowerPC
 {
-const u32 ICACHE_SETS = 128;
-const u32 ICACHE_WAYS = 8;
+constexpr u32 ICACHE_SETS = 128;
+constexpr u32 ICACHE_WAYS = 8;
 // size of an instruction cache block in words
-const u32 ICACHE_BLOCK_SIZE = 8;
+constexpr u32 ICACHE_BLOCK_SIZE = 8;
 
-const u32 ICACHE_EXRAM_BIT = 0x10000000;
-const u32 ICACHE_VMEM_BIT = 0x20000000;
+constexpr u32 ICACHE_EXRAM_BIT = 0x10000000;
+constexpr u32 ICACHE_VMEM_BIT = 0x20000000;
 
 struct InstructionCache
 {
-  u32 data[ICACHE_SETS][ICACHE_WAYS][ICACHE_BLOCK_SIZE];
-  u32 tags[ICACHE_SETS][ICACHE_WAYS];
-  u32 plru[ICACHE_SETS];
-  u32 valid[ICACHE_SETS];
+  std::array<std::array<std::array<u32, ICACHE_BLOCK_SIZE>, ICACHE_WAYS>, ICACHE_SETS> data;
+  std::array<std::array<u32, ICACHE_WAYS>, ICACHE_SETS> tags;
+  std::array<u32, ICACHE_SETS> plru;
+  std::array<u32, ICACHE_SETS> valid;
 
-  u32 way_from_valid[255];
-  u32 way_from_plru[128];
+  std::array<u32, 255> way_from_valid;
+  std::array<u32, 128> way_from_plru;
 
-  u8 lookup_table[1 << 20];
-  u8 lookup_table_ex[1 << 21];
-  u8 lookup_table_vmem[1 << 20];
+  std::array<u8, 1 << 20> lookup_table;
+  std::array<u8, 1 << 21> lookup_table_ex;
+  std::array<u8, 1 << 20> lookup_table_vmem;
 
   InstructionCache();
   u32 ReadInstruction(u32 addr);