From 1d5281068d1da9a33e202075c788c2a575eb6475 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Tue, 27 May 2014 23:11:19 -0500 Subject: [PATCH] Remove x86_32 from Jit64. --- Source/Core/Core/PowerPC/Jit64/Jit.cpp | 11 +-- Source/Core/Core/PowerPC/Jit64/Jit.h | 4 - Source/Core/Core/PowerPC/Jit64/JitAsm.cpp | 31 +----- .../Core/Core/PowerPC/Jit64/JitRegCache.cpp | 8 -- Source/Core/Core/PowerPC/Jit64/JitRegCache.h | 4 - .../Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 95 ------------------- .../PowerPC/Jit64/Jit_LoadStorePaired.cpp | 18 +--- 7 files changed, 11 insertions(+), 160 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp index ce0c36b6a5..405d183a80 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit.cpp @@ -247,13 +247,8 @@ static void ImHere() if (ImHereLog) { if (!f) - { -#if _M_X86_64 f.Open("log64.txt", "w"); -#else - f.Open("log32.txt", "w"); -#endif - } + fprintf(f.GetHandle(), "%08x\n", PC); } if (been_here.find(PC) != been_here.end()) @@ -651,12 +646,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc OR(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_ISI)); // Remove the invalid instruction from the icache, forcing a recompile -#if _M_X86_32 - MOV(32, M(jit->GetBlockCache()->GetICachePtr(js.compilerPC)), Imm32(JIT_ICACHE_INVALID_WORD)); -#else MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICachePtr(js.compilerPC))); MOV(32,MatR(RAX),Imm32(JIT_ICACHE_INVALID_WORD)); -#endif WriteExceptionExit(); } diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.h b/Source/Core/Core/PowerPC/Jit64/Jit.h index 8aa618b841..197e19d588 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit.h +++ b/Source/Core/Core/PowerPC/Jit64/Jit.h @@ -76,11 +76,7 @@ public: } const char *GetName() override { -#if _M_X86_64 return "JIT64"; -#else - return "JIT32"; -#endif } // Run! diff --git a/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp b/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp index 742837527a..4c926d2d03 100644 --- a/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp +++ b/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp @@ -37,11 +37,10 @@ void Jit64AsmRoutineManager::Generate() { enterCode = AlignCode16(); ABI_PushAllCalleeSavedRegsAndAdjustStack(); -#if _M_X86_64 + // Two statically allocated registers. MOV(64, R(RBX), Imm64((u64)Memory::base)); MOV(64, R(R15), Imm64((u64)jit->GetBlockCache()->GetCodePointers())); //It's below 2GB so 32 bits are good enough -#endif const u8* outerLoop = GetCodePtr(); ABI_CallFunction(reinterpret_cast(&CoreTiming::Advance)); @@ -85,12 +84,9 @@ void Jit64AsmRoutineManager::Generate() no_mem = J_CC(CC_NZ); } AND(32, R(EAX), Imm32(JIT_ICACHE_MASK)); -#if _M_X86_32 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCache)); -#else MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCache)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); -#endif + if (Core::g_CoreStartupParameter.bWii || Core::g_CoreStartupParameter.bMMU || Core::g_CoreStartupParameter.bTLBHack) { exit_mem = J(); @@ -101,12 +97,9 @@ void Jit64AsmRoutineManager::Generate() TEST(32, R(EAX), Imm32(JIT_ICACHE_VMEM_BIT)); FixupBranch no_vmem = J_CC(CC_Z); AND(32, R(EAX), Imm32(JIT_ICACHE_MASK)); -#if _M_X86_32 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCacheVMEM)); -#else MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCacheVMEM)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); -#endif + if (Core::g_CoreStartupParameter.bWii) exit_vmem = J(); SetJumpTarget(no_vmem); } @@ -115,12 +108,9 @@ void Jit64AsmRoutineManager::Generate() TEST(32, R(EAX), Imm32(JIT_ICACHE_EXRAM_BIT)); FixupBranch no_exram = J_CC(CC_Z); AND(32, R(EAX), Imm32(JIT_ICACHEEX_MASK)); -#if _M_X86_32 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCacheEx)); -#else MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCacheEx)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); -#endif + SetJumpTarget(no_exram); } if (Core::g_CoreStartupParameter.bWii || Core::g_CoreStartupParameter.bMMU || Core::g_CoreStartupParameter.bTLBHack) @@ -136,24 +126,13 @@ void Jit64AsmRoutineManager::Generate() ADD(32, M(&PowerPC::ppcState.DebugCount), Imm8(1)); } //grab from list and jump to it -#if _M_X86_32 - MOV(32, R(EDX), ImmPtr(jit->GetBlockCache()->GetCodePointers())); - JMPptr(MComplex(EDX, EAX, 4, 0)); -#else JMPptr(MComplex(R15, RAX, 8, 0)); -#endif SetJumpTarget(notfound); //Ok, no block, let's jit -#if _M_X86_32 - ABI_AlignStack(4); - PUSH(32, M(&PowerPC::ppcState.pc)); - CALL(reinterpret_cast(&Jit)); - ABI_RestoreStack(4); -#else MOV(32, R(ABI_PARAM1), M(&PowerPC::ppcState.pc)); CALL((void *)&Jit); -#endif + JMP(dispatcherNoCheck); // no point in special casing this SetJumpTarget(bail); diff --git a/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp b/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp index d2f618f305..28e9de7441 100644 --- a/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp +++ b/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp @@ -172,14 +172,10 @@ const int* GPRRegCache::GetAllocationOrder(size_t& count) static const int allocationOrder[] = { // R12, when used as base register, for example in a LEA, can generate bad code! Need to look into this. -#if _M_X86_64 #ifdef _WIN32 RSI, RDI, R13, R14, R8, R9, R10, R11, R12, //, RCX #else RBP, R13, R14, R8, R9, R10, R11, R12, //, RCX -#endif -#elif _M_X86_32 - ESI, EDI, EBX, EBP, EDX, ECX, #endif }; count = sizeof(allocationOrder) / sizeof(const int); @@ -190,11 +186,7 @@ const int* FPURegCache::GetAllocationOrder(size_t& count) { static const int allocationOrder[] = { -#if _M_X86_64 XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5 -#elif _M_X86_32 - XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, -#endif }; count = sizeof(allocationOrder) / sizeof(int); return allocationOrder; diff --git a/Source/Core/Core/PowerPC/Jit64/JitRegCache.h b/Source/Core/Core/PowerPC/Jit64/JitRegCache.h index 724f9b3d7b..d4e984f537 100644 --- a/Source/Core/Core/PowerPC/Jit64/JitRegCache.h +++ b/Source/Core/Core/PowerPC/Jit64/JitRegCache.h @@ -33,11 +33,7 @@ struct X64CachedReg typedef int XReg; typedef int PReg; -#if _M_X86_64 #define NUMXREGS 16 -#elif _M_X86_32 -#define NUMXREGS 8 -#endif class RegCache { diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index 0717aac06a..6e40961a93 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -1171,7 +1171,6 @@ void Jit64::divwux(UGeckoInstruction inst) if (((u64)(magic+1) * (max_quotient*divisor-1)) >> (shift + 32) != max_quotient-1) { // If failed, use slower round-down method -#if _M_X86_64 gpr.Lock(a, b, d); gpr.BindToRegister(d, d == a, true); MOV(32, R(EAX), Imm32(magic)); @@ -1180,24 +1179,10 @@ void Jit64::divwux(UGeckoInstruction inst) IMUL(64, gpr.RX(d), R(RAX)); ADD(64, gpr.R(d), R(RAX)); SHR(64, gpr.R(d), Imm8(shift+32)); -#else - gpr.FlushLockX(EDX); - gpr.Lock(a, b, d); - gpr.BindToRegister(d, d == a, true); - MOV(32, R(EAX), Imm32(magic)); - MUL(32, gpr.R(a)); - XOR(32, gpr.R(d), gpr.R(d)); - ADD(32, R(EAX), Imm32(magic)); - ADC(32, gpr.R(d), R(EDX)); - if (shift) - SHR(32, gpr.R(d), Imm8(shift)); - gpr.UnlockAllX(); -#endif } else { // If success, use faster round-up method -#if _M_X86_64 gpr.Lock(a, b, d); gpr.BindToRegister(a, true, false); gpr.BindToRegister(d, false, true); @@ -1212,17 +1197,6 @@ void Jit64::divwux(UGeckoInstruction inst) IMUL(64, gpr.RX(d), gpr.R(a)); } SHR(64, gpr.R(d), Imm8(shift+32)); -#else - gpr.FlushLockX(EDX); - gpr.Lock(a, b, d); - gpr.BindToRegister(d, d == a, true); - MOV(32, R(EAX), Imm32(magic+1)); - MUL(32, gpr.R(a)); - MOV(32, gpr.R(d), R(EDX)); - if (shift) - SHR(32, gpr.R(d), Imm8(shift)); - gpr.UnlockAllX(); -#endif } } if (inst.OE) @@ -1753,7 +1727,6 @@ void Jit64::srwx(UGeckoInstruction inst) } else { -#if _M_X86_64 gpr.FlushLockX(ECX); gpr.Lock(a, b, s); gpr.BindToRegister(a, (a == b || a == s), true); @@ -1765,23 +1738,6 @@ void Jit64::srwx(UGeckoInstruction inst) SHR(64, gpr.R(a), R(ECX)); gpr.UnlockAll(); gpr.UnlockAllX(); -#else - gpr.FlushLockX(ECX); - gpr.Lock(a, b, s); - gpr.BindToRegister(a, (a == b || a == s), true); - MOV(32, R(ECX), gpr.R(b)); - TEST(32, R(ECX), Imm32(32)); - if (a != s) - { - MOV(32, gpr.R(a), gpr.R(s)); - } - FixupBranch branch = J_CC(CC_Z); - XOR(32, gpr.R(a), gpr.R(a)); - SetJumpTarget(branch); - SHR(32, gpr.R(a), R(ECX)); - gpr.UnlockAll(); - gpr.UnlockAllX(); -#endif } // Shift of 0 doesn't update flags, so compare manually just in case if (inst.Rc) @@ -1809,7 +1765,6 @@ void Jit64::slwx(UGeckoInstruction inst) } else { -#if _M_X86_64 gpr.FlushLockX(ECX); gpr.Lock(a, b, s); gpr.BindToRegister(a, (a == b || a == s), true); @@ -1830,28 +1785,6 @@ void Jit64::slwx(UGeckoInstruction inst) } gpr.UnlockAll(); gpr.UnlockAllX(); -#else - gpr.FlushLockX(ECX); - gpr.Lock(a, b, s); - gpr.BindToRegister(a, (a == b || a == s), true); - MOV(32, R(ECX), gpr.R(b)); - TEST(32, R(ECX), Imm32(32)); - if (a != s) - { - MOV(32, gpr.R(a), gpr.R(s)); - } - FixupBranch branch = J_CC(CC_Z); - XOR(32, gpr.R(a), gpr.R(a)); - SetJumpTarget(branch); - SHL(32, gpr.R(a), R(ECX)); - gpr.UnlockAll(); - gpr.UnlockAllX(); - // Shift of 0 doesn't update flags, so compare manually just in case - if (inst.Rc) - { - ComputeRC(gpr.R(a)); - } -#endif } } @@ -1863,7 +1796,6 @@ void Jit64::srawx(UGeckoInstruction inst) int a = inst.RA; int b = inst.RB; int s = inst.RS; -#if _M_X86_64 gpr.Lock(a, s, b); gpr.FlushLockX(ECX); gpr.BindToRegister(a, (a == s || a == b), true); @@ -1881,33 +1813,6 @@ void Jit64::srawx(UGeckoInstruction inst) SetJumpTarget(nocarry); gpr.UnlockAll(); gpr.UnlockAllX(); -#else - gpr.Lock(a, s, b); - gpr.FlushLockX(ECX); - gpr.BindToRegister(a, (a == s || a == b), true); - JitClearCA(); - MOV(32, R(ECX), gpr.R(b)); - if (a != s) - MOV(32, gpr.R(a), gpr.R(s)); - TEST(32, R(ECX), Imm32(32)); - FixupBranch topBitSet = J_CC(CC_NZ); - XOR(32, R(EAX), R(EAX)); - SHRD(32, R(EAX), gpr.R(a), R(ECX)); - SAR(32, gpr.R(a), R(ECX)); - TEST(32, R(EAX), gpr.R(a)); - FixupBranch nocarry1 = J_CC(CC_Z); - JitSetCA(); - FixupBranch end = J(); - SetJumpTarget(topBitSet); - SAR(32, gpr.R(a), Imm8(31)); - FixupBranch nocarry2 = J_CC(CC_Z); - JitSetCA(); - SetJumpTarget(end); - SetJumpTarget(nocarry1); - SetJumpTarget(nocarry2); - gpr.UnlockAll(); - gpr.UnlockAllX(); -#endif if (inst.Rc) { ComputeRC(gpr.R(a)); } diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp index 19bb9c3599..47867c4f3f 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp @@ -40,21 +40,17 @@ void Jit64::psq_st(UGeckoInstruction inst) MOV(32, gpr.R(a), R(ECX)); MOVZX(32, 16, EAX, M(&PowerPC::ppcState.spr[SPR_GQR0 + inst.I])); MOVZX(32, 8, EDX, R(AL)); + // FIXME: Fix ModR/M encoding to allow [EDX*4+disp32] without a base register! -#if _M_X86_32 - int addr_scale = SCALE_4; -#else - int addr_scale = SCALE_8; -#endif if (inst.W) { // One value PXOR(XMM0, R(XMM0)); // TODO: See if we can get rid of this cheaply by tweaking the code in the singleStore* functions. CVTSD2SS(XMM0, fpr.R(s)); - CALLptr(MScaled(EDX, addr_scale, (u32)(u64)asm_routines.singleStoreQuantized)); + CALLptr(MScaled(EDX, SCALE_8, (u32)(u64)asm_routines.singleStoreQuantized)); } else { // Pair of values CVTPD2PS(XMM0, fpr.R(s)); - CALLptr(MScaled(EDX, addr_scale, (u32)(u64)asm_routines.pairedStoreQuantized)); + CALLptr(MScaled(EDX, SCALE_8, (u32)(u64)asm_routines.pairedStoreQuantized)); } gpr.UnlockAll(); gpr.UnlockAllX(); @@ -83,13 +79,9 @@ void Jit64::psq_l(UGeckoInstruction inst) MOVZX(32, 8, EDX, R(AL)); if (inst.W) OR(32, R(EDX), Imm8(8)); -#if _M_X86_32 - int addr_scale = SCALE_4; -#else - int addr_scale = SCALE_8; -#endif + ABI_AlignStack(0); - CALLptr(MScaled(EDX, addr_scale, (u32)(u64)asm_routines.pairedLoadQuantized)); + CALLptr(MScaled(EDX, SCALE_8, (u32)(u64)asm_routines.pairedLoadQuantized)); ABI_RestoreStack(0); // MEMCHECK_START // FIXME: MMU does not work here because of unsafe memory access