From 1c25e6352a742542506100e93b370d8185b7a821 Mon Sep 17 00:00:00 2001 From: Sintendo Date: Sun, 19 Apr 2020 23:02:13 +0200 Subject: [PATCH] Jit64: addx - Emit nothing when possible When the destination register matches a source register, the other source register contains zero, and overflow isn't needed, the instruction becomes a nop and we don't need to emit anything. We could add specialized handling for the case where overflow is needed, but none of the titles I tried would hit this path. Before: 83 C7 00 add edi,0 After: --- Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index 62cfb48594..39452e2512 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -1333,7 +1333,10 @@ void Jit64::addx(UGeckoInstruction inst) if ((d == a) || (d == b)) { RCOpArg& Rnotd = (d == a) ? Rb : Ra; - ADD(32, Rd, Rnotd); + if (!Rnotd.IsZero() || inst.OE) + { + ADD(32, Rd, Rnotd); + } } else if (Ra.IsSimpleReg() && Rb.IsSimpleReg() && !inst.OE) {