Jit64: indent far code because it looks nice
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@ -623,12 +623,13 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
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CMP(32, PPCSTATE(spr[SPR_GQR0 + gqr]), Imm8(0));
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FixupBranch failure = J_CC(CC_NZ, true);
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SwitchToFarCode();
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SetJumpTarget(failure);
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MOV(32, PPCSTATE(pc), Imm32(js.blockStart));
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ABI_PushRegistersAndAdjustStack({}, 0);
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ABI_CallFunctionC((void *)&JitInterface::CompileExceptionCheck, (u32)JitInterface::ExceptionType::EXCEPTIONS_PAIRED_QUANTIZE);
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ABI_PopRegistersAndAdjustStack({}, 0);
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JMP(asm_routines.dispatcher, true);
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SetJumpTarget(failure);
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MOV(32, PPCSTATE(pc), Imm32(js.blockStart));
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ABI_PushRegistersAndAdjustStack({}, 0);
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ABI_CallFunctionC((void *)&JitInterface::CompileExceptionCheck,
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(u32)JitInterface::ExceptionType::EXCEPTIONS_PAIRED_QUANTIZE);
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ABI_PopRegistersAndAdjustStack({}, 0);
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JMP(asm_routines.dispatcher, true);
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SwitchToNearCode();
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js.assumeNoPairedQuantize = true;
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}
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@ -684,19 +685,21 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
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{
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TEST(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_EXTERNAL_INT));
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FixupBranch extException = J_CC(CC_NZ, true);
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SwitchToFarCode();
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SetJumpTarget(extException);
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TEST(32, PPCSTATE(msr), Imm32(0x0008000));
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FixupBranch noExtIntEnable = J_CC(CC_Z, true);
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TEST(32, M(&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP | ProcessorInterface::INT_CAUSE_PE_TOKEN | ProcessorInterface::INT_CAUSE_PE_FINISH));
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FixupBranch noCPInt = J_CC(CC_Z, true);
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SetJumpTarget(extException);
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TEST(32, PPCSTATE(msr), Imm32(0x0008000));
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FixupBranch noExtIntEnable = J_CC(CC_Z, true);
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TEST(32, M(&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP |
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ProcessorInterface::INT_CAUSE_PE_TOKEN |
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ProcessorInterface::INT_CAUSE_PE_FINISH));
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FixupBranch noCPInt = J_CC(CC_Z, true);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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WriteExternalExceptionExit();
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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WriteExternalExceptionExit();
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SwitchToNearCode();
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SetJumpTarget(noCPInt);
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@ -731,18 +734,19 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
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//This instruction uses FPU - needs to add FP exception bailout
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TEST(32, PPCSTATE(msr), Imm32(1 << 13)); // Test FP enabled bit
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FixupBranch b1 = J_CC(CC_Z, true);
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SwitchToFarCode();
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SetJumpTarget(b1);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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// If a FPU exception occurs, the exception handler will read
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// from PC. Update PC with the latest value in case that happens.
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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OR(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_FPU_UNAVAILABLE));
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WriteExceptionExit();
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SetJumpTarget(b1);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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// If a FPU exception occurs, the exception handler will read
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// from PC. Update PC with the latest value in case that happens.
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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OR(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_FPU_UNAVAILABLE));
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WriteExceptionExit();
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SwitchToNearCode();
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js.firstFPInstructionFound = true;
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}
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@ -802,29 +806,29 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
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}
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SwitchToFarCode();
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if (!js.fastmemLoadStore)
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{
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exceptionHandlerAtLoc[js.fastmemLoadStore] = nullptr;
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SetJumpTarget(js.fixupExceptionHandler ? js.exceptionHandler : memException);
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}
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else
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{
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exceptionHandlerAtLoc[js.fastmemLoadStore] = GetWritableCodePtr();
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}
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if (!js.fastmemLoadStore)
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{
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exceptionHandlerAtLoc[js.fastmemLoadStore] = nullptr;
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SetJumpTarget(js.fixupExceptionHandler ? js.exceptionHandler : memException);
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}
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else
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{
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exceptionHandlerAtLoc[js.fastmemLoadStore] = GetWritableCodePtr();
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}
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BitSet32 gprToFlush = BitSet32::AllTrue(32);
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BitSet32 fprToFlush = BitSet32::AllTrue(32);
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if (js.revertGprLoad >= 0)
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gprToFlush[js.revertGprLoad] = false;
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if (js.revertFprLoad >= 0)
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fprToFlush[js.revertFprLoad] = false;
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gpr.Flush(FLUSH_MAINTAIN_STATE, gprToFlush);
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fpr.Flush(FLUSH_MAINTAIN_STATE, fprToFlush);
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BitSet32 gprToFlush = BitSet32::AllTrue(32);
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BitSet32 fprToFlush = BitSet32::AllTrue(32);
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if (js.revertGprLoad >= 0)
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gprToFlush[js.revertGprLoad] = false;
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if (js.revertFprLoad >= 0)
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fprToFlush[js.revertFprLoad] = false;
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gpr.Flush(FLUSH_MAINTAIN_STATE, gprToFlush);
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fpr.Flush(FLUSH_MAINTAIN_STATE, fprToFlush);
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// If a memory exception occurs, the exception handler will read
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// from PC. Update PC with the latest value in case that happens.
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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WriteExceptionExit();
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// If a memory exception occurs, the exception handler will read
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// from PC. Update PC with the latest value in case that happens.
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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WriteExceptionExit();
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SwitchToNearCode();
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}
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@ -336,15 +336,15 @@ void Jit64::dcbz(UGeckoInstruction inst)
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// Should this code ever run? I can't find any games that use DCBZ on non-physical addresses, but
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// supposedly there are, at least for some MMU titles. Let's be careful and support it to be sure.
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SwitchToFarCode();
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SetJumpTarget(slow);
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MOV(32, M(&PC), Imm32(jit->js.compilerPC));
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BitSet32 registersInUse = CallerSavedRegistersInUse();
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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ABI_CallFunctionR((void *)&PowerPC::ClearCacheLine, RSCRATCH);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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FixupBranch exit = J(true);
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SetJumpTarget(slow);
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MOV(32, M(&PC), Imm32(jit->js.compilerPC));
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BitSet32 registersInUse = CallerSavedRegistersInUse();
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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ABI_CallFunctionR((void *)&PowerPC::ClearCacheLine, RSCRATCH);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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FixupBranch exit = J(true);
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SwitchToNearCode();
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// Mask out the address so we don't write to MEM1 out of bounds
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// FIXME: Work out why the AGP disc writes out of bounds
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if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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@ -895,22 +895,22 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
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CVTSD2SS(dst, R(src));
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SwitchToFarCode();
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SetJumpTarget(nanConversion);
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MOVQ_xmm(R(RSCRATCH), src);
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// Put the quiet bit into CF.
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BT(64, R(RSCRATCH), Imm8(51));
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CVTSD2SS(dst, R(src));
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FixupBranch continue1 = J_CC(CC_C, true);
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// Clear the quiet bit of the SNaN, which was 0 (signalling) but got set to 1 (quiet) by conversion.
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ANDPS(dst, M(&single_qnan_bit));
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FixupBranch continue2 = J(true);
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SetJumpTarget(nanConversion);
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MOVQ_xmm(R(RSCRATCH), src);
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// Put the quiet bit into CF.
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BT(64, R(RSCRATCH), Imm8(51));
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CVTSD2SS(dst, R(src));
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FixupBranch continue1 = J_CC(CC_C, true);
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// Clear the quiet bit of the SNaN, which was 0 (signalling) but got set to 1 (quiet) by conversion.
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ANDPS(dst, M(&single_qnan_bit));
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FixupBranch continue2 = J(true);
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SetJumpTarget(denormalConversion);
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MOVSD(M(&temp64), src);
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FLD(64, M(&temp64));
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FSTP(32, M(&temp32));
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MOVSS(dst, M(&temp32));
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FixupBranch continue3 = J(true);
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SetJumpTarget(denormalConversion);
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MOVSD(M(&temp64), src);
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FLD(64, M(&temp64));
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FSTP(32, M(&temp32));
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MOVSS(dst, M(&temp32));
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FixupBranch continue3 = J(true);
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SwitchToNearCode();
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SetJumpTarget(continue1);
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@ -941,11 +941,11 @@ void EmuCodeBlock::ConvertSingleToDouble(X64Reg dst, X64Reg src, bool src_is_gpr
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FixupBranch nanConversion = J_CC(CC_P, true);
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SwitchToFarCode();
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SetJumpTarget(nanConversion);
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TEST(32, R(gprsrc), Imm32(0x00400000));
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FixupBranch continue1 = J_CC(CC_NZ, true);
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ANDPD(dst, M(&double_qnan_bit));
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FixupBranch continue2 = J(true);
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SetJumpTarget(nanConversion);
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TEST(32, R(gprsrc), Imm32(0x00400000));
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FixupBranch continue1 = J_CC(CC_NZ, true);
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ANDPD(dst, M(&double_qnan_bit));
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FixupBranch continue2 = J(true);
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SwitchToNearCode();
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SetJumpTarget(continue1);
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