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Jit64: indent far code because it looks nice

This commit is contained in:
Tillmann Karras 2015-05-14 18:57:54 +02:00
parent 6c5e5cc7b8
commit 1b01911c01
3 changed files with 78 additions and 74 deletions
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96
Source/Core/Core/PowerPC/Jit64/Jit.cpp
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@ -623,12 +623,13 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
CMP(32, PPCSTATE(spr[SPR_GQR0 + gqr]), Imm8(0)); CMP(32, PPCSTATE(spr[SPR_GQR0 + gqr]), Imm8(0));
FixupBranch failure = J_CC(CC_NZ, true); FixupBranch failure = J_CC(CC_NZ, true);
SwitchToFarCode(); SwitchToFarCode();
SetJumpTarget(failure); SetJumpTarget(failure);
MOV(32, PPCSTATE(pc), Imm32(js.blockStart)); MOV(32, PPCSTATE(pc), Imm32(js.blockStart));
ABI_PushRegistersAndAdjustStack({}, 0); ABI_PushRegistersAndAdjustStack({}, 0);
ABI_CallFunctionC((void *)&JitInterface::CompileExceptionCheck, (u32)JitInterface::ExceptionType::EXCEPTIONS_PAIRED_QUANTIZE); ABI_CallFunctionC((void *)&JitInterface::CompileExceptionCheck,
ABI_PopRegistersAndAdjustStack({}, 0); (u32)JitInterface::ExceptionType::EXCEPTIONS_PAIRED_QUANTIZE);
JMP(asm_routines.dispatcher, true); ABI_PopRegistersAndAdjustStack({}, 0);
JMP(asm_routines.dispatcher, true);
SwitchToNearCode(); SwitchToNearCode();
js.assumeNoPairedQuantize = true; js.assumeNoPairedQuantize = true;
} }
@ -684,19 +685,21 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
{ {
TEST(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_EXTERNAL_INT)); TEST(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_EXTERNAL_INT));
FixupBranch extException = J_CC(CC_NZ, true); FixupBranch extException = J_CC(CC_NZ, true);
SwitchToFarCode(); SwitchToFarCode();
SetJumpTarget(extException); SetJumpTarget(extException);
TEST(32, PPCSTATE(msr), Imm32(0x0008000)); TEST(32, PPCSTATE(msr), Imm32(0x0008000));
FixupBranch noExtIntEnable = J_CC(CC_Z, true); FixupBranch noExtIntEnable = J_CC(CC_Z, true);
TEST(32, M(&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP | ProcessorInterface::INT_CAUSE_PE_TOKEN | ProcessorInterface::INT_CAUSE_PE_FINISH)); TEST(32, M(&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP |
FixupBranch noCPInt = J_CC(CC_Z, true); ProcessorInterface::INT_CAUSE_PE_TOKEN |
ProcessorInterface::INT_CAUSE_PE_FINISH));
FixupBranch noCPInt = J_CC(CC_Z, true);
gpr.Flush(FLUSH_MAINTAIN_STATE); gpr.Flush(FLUSH_MAINTAIN_STATE);
fpr.Flush(FLUSH_MAINTAIN_STATE); fpr.Flush(FLUSH_MAINTAIN_STATE);
MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
WriteExternalExceptionExit();
MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
WriteExternalExceptionExit();
SwitchToNearCode(); SwitchToNearCode();
SetJumpTarget(noCPInt); SetJumpTarget(noCPInt);
@ -731,18 +734,19 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
//This instruction uses FPU - needs to add FP exception bailout //This instruction uses FPU - needs to add FP exception bailout
TEST(32, PPCSTATE(msr), Imm32(1 << 13)); // Test FP enabled bit TEST(32, PPCSTATE(msr), Imm32(1 << 13)); // Test FP enabled bit
FixupBranch b1 = J_CC(CC_Z, true); FixupBranch b1 = J_CC(CC_Z, true);
SwitchToFarCode(); SwitchToFarCode();
SetJumpTarget(b1); SetJumpTarget(b1);
gpr.Flush(FLUSH_MAINTAIN_STATE); gpr.Flush(FLUSH_MAINTAIN_STATE);
fpr.Flush(FLUSH_MAINTAIN_STATE); fpr.Flush(FLUSH_MAINTAIN_STATE);
// If a FPU exception occurs, the exception handler will read
// from PC. Update PC with the latest value in case that happens.
MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
OR(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_FPU_UNAVAILABLE));
WriteExceptionExit();
// If a FPU exception occurs, the exception handler will read
// from PC. Update PC with the latest value in case that happens.
MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
OR(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_FPU_UNAVAILABLE));
WriteExceptionExit();
SwitchToNearCode(); SwitchToNearCode();
js.firstFPInstructionFound = true; js.firstFPInstructionFound = true;
} }
@ -802,29 +806,29 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
} }
SwitchToFarCode(); SwitchToFarCode();
if (!js.fastmemLoadStore) if (!js.fastmemLoadStore)
{ {
exceptionHandlerAtLoc[js.fastmemLoadStore] = nullptr; exceptionHandlerAtLoc[js.fastmemLoadStore] = nullptr;
SetJumpTarget(js.fixupExceptionHandler ? js.exceptionHandler : memException); SetJumpTarget(js.fixupExceptionHandler ? js.exceptionHandler : memException);
} }
else else
{ {
exceptionHandlerAtLoc[js.fastmemLoadStore] = GetWritableCodePtr(); exceptionHandlerAtLoc[js.fastmemLoadStore] = GetWritableCodePtr();
} }
BitSet32 gprToFlush = BitSet32::AllTrue(32); BitSet32 gprToFlush = BitSet32::AllTrue(32);
BitSet32 fprToFlush = BitSet32::AllTrue(32); BitSet32 fprToFlush = BitSet32::AllTrue(32);
if (js.revertGprLoad >= 0) if (js.revertGprLoad >= 0)
gprToFlush[js.revertGprLoad] = false; gprToFlush[js.revertGprLoad] = false;
if (js.revertFprLoad >= 0) if (js.revertFprLoad >= 0)
fprToFlush[js.revertFprLoad] = false; fprToFlush[js.revertFprLoad] = false;
gpr.Flush(FLUSH_MAINTAIN_STATE, gprToFlush); gpr.Flush(FLUSH_MAINTAIN_STATE, gprToFlush);
fpr.Flush(FLUSH_MAINTAIN_STATE, fprToFlush); fpr.Flush(FLUSH_MAINTAIN_STATE, fprToFlush);
// If a memory exception occurs, the exception handler will read // If a memory exception occurs, the exception handler will read
// from PC. Update PC with the latest value in case that happens. // from PC. Update PC with the latest value in case that happens.
MOV(32, PPCSTATE(pc), Imm32(ops[i].address)); MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
WriteExceptionExit(); WriteExceptionExit();
SwitchToNearCode(); SwitchToNearCode();
} }

16
Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
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@ -336,15 +336,15 @@ void Jit64::dcbz(UGeckoInstruction inst)
// Should this code ever run? I can't find any games that use DCBZ on non-physical addresses, but // Should this code ever run? I can't find any games that use DCBZ on non-physical addresses, but
// supposedly there are, at least for some MMU titles. Let's be careful and support it to be sure. // supposedly there are, at least for some MMU titles. Let's be careful and support it to be sure.
SwitchToFarCode(); SwitchToFarCode();
SetJumpTarget(slow); SetJumpTarget(slow);
MOV(32, M(&PC), Imm32(jit->js.compilerPC)); MOV(32, M(&PC), Imm32(jit->js.compilerPC));
BitSet32 registersInUse = CallerSavedRegistersInUse(); BitSet32 registersInUse = CallerSavedRegistersInUse();
ABI_PushRegistersAndAdjustStack(registersInUse, 0); ABI_PushRegistersAndAdjustStack(registersInUse, 0);
ABI_CallFunctionR((void *)&PowerPC::ClearCacheLine, RSCRATCH); ABI_CallFunctionR((void *)&PowerPC::ClearCacheLine, RSCRATCH);
ABI_PopRegistersAndAdjustStack(registersInUse, 0); ABI_PopRegistersAndAdjustStack(registersInUse, 0);
FixupBranch exit = J(true); FixupBranch exit = J(true);
SwitchToNearCode(); SwitchToNearCode();
// Mask out the address so we don't write to MEM1 out of bounds // Mask out the address so we don't write to MEM1 out of bounds
// FIXME: Work out why the AGP disc writes out of bounds // FIXME: Work out why the AGP disc writes out of bounds
if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bWii) if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)

40
Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
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@ -895,22 +895,22 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
CVTSD2SS(dst, R(src)); CVTSD2SS(dst, R(src));
SwitchToFarCode(); SwitchToFarCode();
SetJumpTarget(nanConversion); SetJumpTarget(nanConversion);
MOVQ_xmm(R(RSCRATCH), src); MOVQ_xmm(R(RSCRATCH), src);
// Put the quiet bit into CF. // Put the quiet bit into CF.
BT(64, R(RSCRATCH), Imm8(51)); BT(64, R(RSCRATCH), Imm8(51));
CVTSD2SS(dst, R(src)); CVTSD2SS(dst, R(src));
FixupBranch continue1 = J_CC(CC_C, true); FixupBranch continue1 = J_CC(CC_C, true);
// Clear the quiet bit of the SNaN, which was 0 (signalling) but got set to 1 (quiet) by conversion. // Clear the quiet bit of the SNaN, which was 0 (signalling) but got set to 1 (quiet) by conversion.
ANDPS(dst, M(&single_qnan_bit)); ANDPS(dst, M(&single_qnan_bit));
FixupBranch continue2 = J(true); FixupBranch continue2 = J(true);
SetJumpTarget(denormalConversion); SetJumpTarget(denormalConversion);
MOVSD(M(&temp64), src); MOVSD(M(&temp64), src);
FLD(64, M(&temp64)); FLD(64, M(&temp64));
FSTP(32, M(&temp32)); FSTP(32, M(&temp32));
MOVSS(dst, M(&temp32)); MOVSS(dst, M(&temp32));
FixupBranch continue3 = J(true); FixupBranch continue3 = J(true);
SwitchToNearCode(); SwitchToNearCode();
SetJumpTarget(continue1); SetJumpTarget(continue1);
@ -941,11 +941,11 @@ void EmuCodeBlock::ConvertSingleToDouble(X64Reg dst, X64Reg src, bool src_is_gpr
FixupBranch nanConversion = J_CC(CC_P, true); FixupBranch nanConversion = J_CC(CC_P, true);
SwitchToFarCode(); SwitchToFarCode();
SetJumpTarget(nanConversion); SetJumpTarget(nanConversion);
TEST(32, R(gprsrc), Imm32(0x00400000)); TEST(32, R(gprsrc), Imm32(0x00400000));
FixupBranch continue1 = J_CC(CC_NZ, true); FixupBranch continue1 = J_CC(CC_NZ, true);
ANDPD(dst, M(&double_qnan_bit)); ANDPD(dst, M(&double_qnan_bit));
FixupBranch continue2 = J(true); FixupBranch continue2 = J(true);
SwitchToNearCode(); SwitchToNearCode();
SetJumpTarget(continue1); SetJumpTarget(continue1);