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Merge pull request #9874 from JosJuice/jitarm64-unconditional-farcode 

JitArm64: Get rid of an unconditional branch to farcode
This commit is contained in:
Markus Wick 2021-07-08 13:01:21 +02:00 committed by GitHub
parent 98098edad7 a6700a074d
commit 1827cb9cd8
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 11 additions and 10 deletions
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21
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
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@ -733,11 +733,6 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
BitSet32 fprs_in_use = fpr.GetCallerSavedUsed(); BitSet32 fprs_in_use = fpr.GetCallerSavedUsed();
regs_in_use[DecodeReg(ARM64Reg::W30)] = 0; regs_in_use[DecodeReg(ARM64Reg::W30)] = 0;
FixupBranch Exception = B();
SwitchToFarCode();
const u8* done_here = GetCodePtr();
FixupBranch exit = B();
SetJumpTarget(Exception);
ABI_PushRegisters(regs_in_use); ABI_PushRegisters(regs_in_use);
m_float_emit.ABI_PushRegisters(fprs_in_use, ARM64Reg::X30); m_float_emit.ABI_PushRegisters(fprs_in_use, ARM64Reg::X30);
MOVP2R(ARM64Reg::X8, &GPFifo::FastCheckGatherPipe); MOVP2R(ARM64Reg::X8, &GPFifo::FastCheckGatherPipe);
@ -747,7 +742,12 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
// Inline exception check // Inline exception check
LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(Exceptions)); LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(Exceptions));
TBZ(ARM64Reg::W30, IntLog2(EXCEPTION_EXTERNAL_INT), done_here); FixupBranch no_ext_exception = TBZ(ARM64Reg::W30, IntLog2(EXCEPTION_EXTERNAL_INT));
FixupBranch exception = B();
SwitchToFarCode();
const u8* done_here = GetCodePtr();
FixupBranch exit = B();
SetJumpTarget(exception);
LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(msr)); LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(msr));
TBZ(ARM64Reg::W30, 15, done_here); // MSR.EE TBZ(ARM64Reg::W30, 15, done_here); // MSR.EE
MOVP2R(ARM64Reg::X30, &ProcessorInterface::m_InterruptCause); MOVP2R(ARM64Reg::X30, &ProcessorInterface::m_InterruptCause);
@ -759,6 +759,7 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
fpr.Flush(FlushMode::MaintainState); fpr.Flush(FlushMode::MaintainState);
WriteExceptionExit(js.compilerPC, true); WriteExceptionExit(js.compilerPC, true);
SwitchToNearCode(); SwitchToNearCode();
SetJumpTarget(no_ext_exception);
SetJumpTarget(exit); SetJumpTarget(exit);
gpr.Unlock(ARM64Reg::W30); gpr.Unlock(ARM64Reg::W30);
@ -773,12 +774,12 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
ARM64Reg WA = gpr.GetReg(); ARM64Reg WA = gpr.GetReg();
ARM64Reg XA = EncodeRegTo64(WA); ARM64Reg XA = EncodeRegTo64(WA);
LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions));
FixupBranch NoExtException = TBZ(WA, IntLog2(EXCEPTION_EXTERNAL_INT)); FixupBranch no_ext_exception = TBZ(WA, IntLog2(EXCEPTION_EXTERNAL_INT));
FixupBranch Exception = B(); FixupBranch exception = B();
SwitchToFarCode(); SwitchToFarCode();
const u8* done_here = GetCodePtr(); const u8* done_here = GetCodePtr();
FixupBranch exit = B(); FixupBranch exit = B();
SetJumpTarget(Exception); SetJumpTarget(exception);
LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(msr)); LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(msr));
TBZ(WA, 15, done_here); // MSR.EE TBZ(WA, 15, done_here); // MSR.EE
MOVP2R(XA, &ProcessorInterface::m_InterruptCause); MOVP2R(XA, &ProcessorInterface::m_InterruptCause);
@ -791,7 +792,7 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
fpr.Flush(FlushMode::MaintainState); fpr.Flush(FlushMode::MaintainState);
WriteExceptionExit(js.compilerPC, true); WriteExceptionExit(js.compilerPC, true);
SwitchToNearCode(); SwitchToNearCode();
SetJumpTarget(NoExtException); SetJumpTarget(no_ext_exception);
SetJumpTarget(exit); SetJumpTarget(exit);
} }