From a6700a074d632ec40b7761e71666d6dac89c1c96 Mon Sep 17 00:00:00 2001
From: JosJuice <josjuice@gmail.com>
Date: Wed, 7 Jul 2021 14:11:07 +0200
Subject: [PATCH] JitArm64: Get rid of an unconditional branch to farcode

If a branch is unconditional, its target should not be in farcode,
since that defeats the purpose of farcode (putting seldom executed
code in farcode to keep it out of the icache when possible).
---
 Source/Core/Core/PowerPC/JitArm64/Jit.cpp | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp
index 492ec083c9..8701cafb45 100644
--- a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp
@@ -733,11 +733,6 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
       BitSet32 fprs_in_use = fpr.GetCallerSavedUsed();
       regs_in_use[DecodeReg(ARM64Reg::W30)] = 0;
 
-      FixupBranch Exception = B();
-      SwitchToFarCode();
-      const u8* done_here = GetCodePtr();
-      FixupBranch exit = B();
-      SetJumpTarget(Exception);
       ABI_PushRegisters(regs_in_use);
       m_float_emit.ABI_PushRegisters(fprs_in_use, ARM64Reg::X30);
       MOVP2R(ARM64Reg::X8, &GPFifo::FastCheckGatherPipe);
@@ -747,7 +742,12 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
 
       // Inline exception check
       LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(Exceptions));
-      TBZ(ARM64Reg::W30, IntLog2(EXCEPTION_EXTERNAL_INT), done_here);
+      FixupBranch no_ext_exception = TBZ(ARM64Reg::W30, IntLog2(EXCEPTION_EXTERNAL_INT));
+      FixupBranch exception = B();
+      SwitchToFarCode();
+      const u8* done_here = GetCodePtr();
+      FixupBranch exit = B();
+      SetJumpTarget(exception);
       LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(msr));
       TBZ(ARM64Reg::W30, 15, done_here);  // MSR.EE
       MOVP2R(ARM64Reg::X30, &ProcessorInterface::m_InterruptCause);
@@ -759,6 +759,7 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
       fpr.Flush(FlushMode::MaintainState);
       WriteExceptionExit(js.compilerPC, true);
       SwitchToNearCode();
+      SetJumpTarget(no_ext_exception);
       SetJumpTarget(exit);
       gpr.Unlock(ARM64Reg::W30);
 
@@ -773,12 +774,12 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
       ARM64Reg WA = gpr.GetReg();
       ARM64Reg XA = EncodeRegTo64(WA);
       LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions));
-      FixupBranch NoExtException = TBZ(WA, IntLog2(EXCEPTION_EXTERNAL_INT));
-      FixupBranch Exception = B();
+      FixupBranch no_ext_exception = TBZ(WA, IntLog2(EXCEPTION_EXTERNAL_INT));
+      FixupBranch exception = B();
       SwitchToFarCode();
       const u8* done_here = GetCodePtr();
       FixupBranch exit = B();
-      SetJumpTarget(Exception);
+      SetJumpTarget(exception);
       LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(msr));
       TBZ(WA, 15, done_here);  // MSR.EE
       MOVP2R(XA, &ProcessorInterface::m_InterruptCause);
@@ -791,7 +792,7 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
       fpr.Flush(FlushMode::MaintainState);
       WriteExceptionExit(js.compilerPC, true);
       SwitchToNearCode();
-      SetJumpTarget(NoExtException);
+      SetJumpTarget(no_ext_exception);
       SetJumpTarget(exit);
     }