From 17d31ecd6c7dc342fdd27a3bc3841e1c08f1f5bb Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Fri, 12 Sep 2014 05:45:10 -0500 Subject: [PATCH] Fix AArch64 MOVI2R helper function. In the case of a zero immediate, it wouldn't generate code at all. Also in the case of max u32/u64, use ORN to optimize it. --- Source/Core/Common/Arm64Emitter.cpp | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp index 3db7b2587a..83e194efef 100644 --- a/Source/Core/Common/Arm64Emitter.cpp +++ b/Source/Core/Common/Arm64Emitter.cpp @@ -2,6 +2,8 @@ // Licensed under GPLv2 // Refer to the license.txt file included. +#include + #include "Arm64Emitter.h" namespace Arm64Gen @@ -1341,6 +1343,23 @@ void ARM64XEmitter::MOVI2R(ARM64Reg Rd, u64 imm, bool optimize) if (!Is64Bit(Rd)) _assert_msg_(DYNA_REC, !(imm >> 32), "%s: immediate doesn't fit in 32bit register: %lx", __FUNCTION__, imm); + if (!imm) + { + // Zero immediate, just clear the register + EOR(Rd, Rd, Rd, ArithOption(Rd, ST_LSL, 0)); + return; + } + + if ((Is64Bit(Rd) && imm == std::numeric_limits::max()) || + (!Is64Bit(Rd) && imm == std::numeric_limits::max())) + { + // Max unsigned value + // Set to ~ZR + ARM64Reg ZR = Is64Bit(Rd) ? SP : WSP; + ORN(Rd, Rd, ZR, ArithOption(ZR, ST_LSL, 0)); + return; + } + // XXX: Optimize more // XXX: Support rotating immediates to save instructions if (optimize)