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Merge pull request #10097 from JosJuice/jitarm64-w0-clobber 

JitArm64: Fix fresx/frsqrtex unlocking W0 too early
This commit is contained in:
Léo Lam 2021-09-14 23:51:24 +02:00 committed by GitHub
parent 819a0a69ff 74f2acd83b
commit 15ec7bd546
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 14 additions and 11 deletions
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25
Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp
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@ -554,23 +554,24 @@ void JitArm64::fresx(UGeckoInstruction inst)
const u32 b = inst.FB; const u32 b = inst.FB;
const u32 d = inst.FD; const u32 d = inst.FD;
gpr.Lock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
fpr.Lock(ARM64Reg::Q0); fpr.Lock(ARM64Reg::Q0);
const ARM64Reg VB = fpr.R(b, RegType::LowerPair); const ARM64Reg VB = fpr.R(b, RegType::LowerPair);
const ARM64Reg VD = fpr.RW(d, RegType::Duplicated);
gpr.Lock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
m_float_emit.FMOV(ARM64Reg::X1, EncodeRegToDouble(VB)); m_float_emit.FMOV(ARM64Reg::X1, EncodeRegToDouble(VB));
m_float_emit.FRECPE(ARM64Reg::D0, EncodeRegToDouble(VB)); m_float_emit.FRECPE(ARM64Reg::D0, EncodeRegToDouble(VB));
BL(GetAsmRoutines()->fres); BL(GetAsmRoutines()->fres);
gpr.Unlock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
fpr.Unlock(ARM64Reg::Q0);
const ARM64Reg VD = fpr.RW(d, RegType::Duplicated);
m_float_emit.FMOV(EncodeRegToDouble(VD), ARM64Reg::X0); m_float_emit.FMOV(EncodeRegToDouble(VD), ARM64Reg::X0);
SetFPRFIfNeeded(false, ARM64Reg::X0); SetFPRFIfNeeded(false, ARM64Reg::X0);
gpr.Unlock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
fpr.Unlock(ARM64Reg::Q0);
} }
void JitArm64::frsqrtex(UGeckoInstruction inst) void JitArm64::frsqrtex(UGeckoInstruction inst)
@ -582,22 +583,24 @@ void JitArm64::frsqrtex(UGeckoInstruction inst)
const u32 b = inst.FB; const u32 b = inst.FB;
const u32 d = inst.FD; const u32 d = inst.FD;
gpr.Lock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
fpr.Lock(ARM64Reg::Q0); fpr.Lock(ARM64Reg::Q0);
const ARM64Reg VB = fpr.R(b, RegType::LowerPair); const ARM64Reg VB = fpr.R(b, RegType::LowerPair);
const ARM64Reg VD = fpr.RW(d, RegType::LowerPair);
gpr.Lock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
m_float_emit.FMOV(ARM64Reg::X1, EncodeRegToDouble(VB)); m_float_emit.FMOV(ARM64Reg::X1, EncodeRegToDouble(VB));
m_float_emit.FRSQRTE(ARM64Reg::D0, EncodeRegToDouble(VB)); m_float_emit.FRSQRTE(ARM64Reg::D0, EncodeRegToDouble(VB));
BL(GetAsmRoutines()->frsqrte); BL(GetAsmRoutines()->frsqrte);
gpr.Unlock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
fpr.Unlock(ARM64Reg::Q0);
const ARM64Reg VD = fpr.RW(d, RegType::LowerPair);
m_float_emit.FMOV(EncodeRegToDouble(VD), ARM64Reg::X0); m_float_emit.FMOV(EncodeRegToDouble(VD), ARM64Reg::X0);
SetFPRFIfNeeded(false, ARM64Reg::X0); SetFPRFIfNeeded(false, ARM64Reg::X0);
gpr.Unlock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W3, ARM64Reg::W4, ARM64Reg::W30);
fpr.Unlock(ARM64Reg::Q0);
} }
// Since the following float conversion functions are used in non-arithmetic PPC float // Since the following float conversion functions are used in non-arithmetic PPC float