DSPTool: make existing tests pass
Disassemble code without the additional text for humans, like the current PC and opcode hex values, so that it can be reassembled. I'm not updating any commented-out tests here.
This commit is contained in:
Michael Maltese
parent
b9b3b1dc19
commit
1580b6e627
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@ -6,6 +6,7 @@
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#include "Common/FileUtil.h"
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#include "Common/FileUtil.h"
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#include "Common/StringUtil.h"
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#include "Common/StringUtil.h"
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#include "Core/DSP/DSPCodeUtil.h"
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#include "Core/DSP/DSPCodeUtil.h"
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#include "Core/DSP/DSPDisassembler.h"
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#include "Core/DSP/DSPHost.h"
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#include "Core/DSP/DSPHost.h"
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#include "Core/DSP/DSPTables.h"
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#include "Core/DSP/DSPTables.h"
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@ -38,13 +39,27 @@ void DSP::Host::UpdateDebugger()
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{
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{
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}
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}
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static bool RoundTrippableDissassemble(const std::vector<u16>& code, std::string& text)
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{
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DSP::AssemblerSettings settings;
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settings.ext_separator = '\'';
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settings.decode_names = true;
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settings.decode_registers = true;
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// These two prevent roundtripping.
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settings.show_hex = false;
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settings.show_pc = false;
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DSP::DSPDisassembler disasm(settings);
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return disasm.Disassemble(0x0000, code, 0x0000, text);
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}
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// This test goes from text ASM to binary to text ASM and once again back to binary.
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// This test goes from text ASM to binary to text ASM and once again back to binary.
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// Then the two binaries are compared.
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// Then the two binaries are compared.
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static bool RoundTrip(const std::vector<u16>& code1)
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static bool RoundTrip(const std::vector<u16>& code1)
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{
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{
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std::vector<u16> code2;
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std::vector<u16> code2;
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std::string text;
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std::string text;
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if (!DSP::Disassemble(code1, false, text))
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if (!RoundTrippableDissassemble(code1, text))
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{
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{
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printf("RoundTrip: Disassembly failed.\n");
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printf("RoundTrip: Disassembly failed.\n");
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return false;
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return false;
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@ -74,7 +89,8 @@ static bool SuperTrip(const char* asm_code)
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return false;
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return false;
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}
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}
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printf("First assembly: %i words\n", (int)code1.size());
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printf("First assembly: %i words\n", (int)code1.size());
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if (!DSP::Disassemble(code1, false, text))
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if (!RoundTrippableDissassemble(code1, text))
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{
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{
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printf("SuperTrip: Disassembly failed\n");
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printf("SuperTrip: Disassembly failed\n");
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return false;
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return false;
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@ -84,6 +100,7 @@ static bool SuperTrip(const char* asm_code)
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printf("Disass:\n");
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printf("Disass:\n");
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printf("%s", text.c_str());
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printf("%s", text.c_str());
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}
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}
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if (!DSP::Assemble(text, code2))
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if (!DSP::Assemble(text, code2))
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{
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{
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printf("SuperTrip: Second assembly failed\n");
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printf("SuperTrip: Second assembly failed\n");
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@ -76,7 +76,7 @@ MEM_LO: equ 0x0f7F
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jmp irq5
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jmp irq5
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jmp irq6
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jmp irq6
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jmp irq7
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jmp irq7
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; Main code at 0x10
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; Main code at 0x10
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CW 0x1302
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CW 0x1302
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CW 0x1303
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CW 0x1303
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@ -86,11 +86,11 @@ MEM_LO: equ 0x0f7F
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s40
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s40
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lri $r12, #0x00ff
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lri $r12, #0x00ff
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main:
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main:
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cw 0x8900
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cw 0x8900
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cw 0x8100
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cw 0x8100
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; get address of memory dump and copy it
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; get address of memory dump and copy it
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@ -177,8 +177,8 @@ main:
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nop
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nop
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cw 0x8600
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cw 0x8600
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call send_back
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call send_back
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@ -188,223 +188,223 @@ main:
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; call dump_memory
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; call dump_memory
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; call send_back
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; call send_back
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; 0x041e
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;
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cw 0x00de
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cw 0x03f1
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; 0x041e
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;
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cw 0x00de
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cw 0x03f1
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call send_back
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call send_back
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cw 0x0200
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cw 0x0200
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cw 0x0a60
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cw 0x0a60
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call send_back
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call send_back
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cw 0x1c7e
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cw 0x1c7e
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call send_back
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call send_back
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cw 0x8100
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cw 0x8100
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call send_back
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call send_back
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cw 0x8900
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cw 0x8900
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call send_back
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call send_back
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cw 0x009f
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cw 0x009f
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cw 0x00a0
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cw 0x00a0
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call send_back
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call send_back
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cw 0x00de
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cw 0x00de
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cw 0x03f1
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cw 0x03f1
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call send_back
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call send_back
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cw 0x5d00
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cw 0x5d00
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call send_back
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call send_back
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cw 0x0e50
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cw 0x0e50
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call send_back
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call send_back
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cw 0x0750
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cw 0x0750
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call send_back
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call send_back
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cw 0x0270
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cw 0x0270
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call send_back
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call send_back
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cw 0x5d00
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cw 0x5d00
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call send_back
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call send_back
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cw 0x00da
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cw 0x00da
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cw 0x03f2
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cw 0x03f2
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call send_back
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call send_back
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cw 0x8600
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cw 0x8600
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call send_back
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call send_back
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JNS g_0c4d
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JGE g_0c4d
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; cw 0x0290
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; cw 0x0290
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; cw 0x0c4d
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; cw 0x0c4d
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; call send_back JX0
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; call send_back JX0
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cw 0x00de
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cw 0x00de
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cw 0x03f3
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cw 0x03f3
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call send_back
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call send_back
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cw 0x5c00
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cw 0x5c00
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call send_back
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call send_back
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JLE g_0c38
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JLE g_0c38
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; cw 0x0293
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; cw 0x0293
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; cw 0x0c38 JX3
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; cw 0x0c38 JX3
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; call send_back
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; call send_back
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JMP g_0c52
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JMP g_0c52
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; cw 0x029f
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; cw 0x029f
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; cw 0x0c52
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; cw 0x0c52
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; call send_back
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; call send_back
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g_0c38:
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g_0c38:
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cw 0x00db
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cw 0x00db
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cw 0x03f7
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cw 0x03f7
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call send_back
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call send_back
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cw 0x009e
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cw 0x009e
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cw 0x8000
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cw 0x8000
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call send_back
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call send_back
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cw 0x4600
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cw 0x4600
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call send_back
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call send_back
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JMP g_0c44
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JMP g_0c44
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; cw 0x029f
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; cw 0x029f
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; cw 0x0c44
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; cw 0x0c44
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; call send_back
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; call send_back
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g_0c3f:
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g_0c3f:
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cw 0x00db
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cw 0x00db
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cw 0x03f7
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cw 0x03f7
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call send_back
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call send_back
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cw 0x009e
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cw 0x009e
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cw 0x8000
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cw 0x8000
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call send_back
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call send_back
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cw 0x5600
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cw 0x5600
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call send_back
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call send_back
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g_0c44:
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g_0c44:
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cw 0x00fe
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cw 0x00fe
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cw 0x03f5
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cw 0x03f5
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call send_back
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call send_back
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cw 0x1fda
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cw 0x1fda
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call send_back
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call send_back
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cw 0x7c00
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cw 0x7c00
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call send_back
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call send_back
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cw 0x1f5e
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cw 0x1f5e
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call send_back
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call send_back
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cw 0x00fe
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cw 0x00fe
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cw 0x03f2
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cw 0x03f2
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call send_back
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call send_back
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JMP g_0c52
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JMP g_0c52
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; cw 0x029f
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; cw 0x029f
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; cw 0x0c52
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; cw 0x0c52
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; call send_back
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; call send_back
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g_0c4d:
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g_0c4d:
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cw 0x00de
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cw 0x00de
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cw 0x03f4
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cw 0x03f4
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call send_back
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call send_back
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cw 0x5d00
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cw 0x5d00
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call send_back
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call send_back
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JLE g_0c3f
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JLE g_0c3f
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; cw 0x0293
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; cw 0x0293
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; cw 0x0c3f
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; cw 0x0c3f
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; call send_back
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; call send_back
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g_0c52:
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g_0c52:
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cw 0x8900
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cw 0x8900
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call send_back
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call send_back
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cw 0x00dd
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cw 0x00dd
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cw 0x03f5
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cw 0x03f5
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call send_back
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call send_back
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cw 0x1501
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cw 0x1501
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call send_back
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call send_back
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cw 0x8100
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cw 0x8100
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call send_back
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call send_back
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cw 0x00dc
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cw 0x00dc
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cw 0x03f6
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cw 0x03f6
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call send_back
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call send_back
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cw 0x008b
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cw 0x008b
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cw 0x009f
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cw 0x009f
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call send_back
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call send_back
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cw 0x0080
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cw 0x0080
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cw 0x0a00
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cw 0x0a00
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call send_back
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call send_back
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cw 0x0900
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cw 0x0900
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call send_back
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call send_back
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BLOOPI #0x50, g_0c65
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BLOOPI #0x50, g_0c65
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; cw 0x1150
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; cw 0x1150
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; cw 0x0c65
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; cw 0x0c65
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; call send_back
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; call send_back
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cw 0x1878
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cw 0x1878
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call send_back
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call send_back
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cw 0x4c00
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cw 0x4c00
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call send_back
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call send_back
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cw 0x1cfe
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cw 0x1cfe
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call send_back
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call send_back
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cw 0x001f
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cw 0x001f
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call send_back
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call send_back
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cw 0x1fd9
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cw 0x1fd9
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call send_back
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call send_back
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g_0c65:
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g_0c65:
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cw 0x1b18
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cw 0x1b18
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call send_back
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call send_back
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cw 0x009f
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cw 0x009f
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cw 0x0a60
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cw 0x0a60
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call send_back
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call send_back
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cw 0x1fc3
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cw 0x1fc3
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call send_back
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call send_back
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cw 0x5c00
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cw 0x5c00
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call send_back
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call send_back
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cw 0x00fe
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cw 0x00fe
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cw 0x03f1
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cw 0x03f1
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call send_back
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call send_back
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cw 0x00fc
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cw 0x00fc
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cw 0x03f6
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cw 0x03f6
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call send_back
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call send_back
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cw 0x008b
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cw 0x008b
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cw 0xffff
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cw 0xffff
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call send_back
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call send_back
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ende:
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ende:
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@ -415,9 +415,9 @@ ende:
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nop
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nop
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nop
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nop
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nop
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nop
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dead_loop:
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dead_loop:
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jmp dead_loop
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jmp dead_loop
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@ -445,7 +445,7 @@ wait_for_cpu_mbox:
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andcf $acl1, #0x8000
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andcf $acl1, #0x8000
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jlnz wait_for_cpu_mbox
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jlnz wait_for_cpu_mbox
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ret
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ret
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irq0:
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irq0:
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lri $acl0, #0x0000
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lri $acl0, #0x0000
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jmp irq
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jmp irq
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@ -455,7 +455,7 @@ irq1:
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irq2:
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irq2:
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lri $acl0, #0x0002
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lri $acl0, #0x0002
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jmp irq
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jmp irq
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irq3:
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irq3:
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lri $acl0, #0x0003
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lri $acl0, #0x0003
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jmp irq
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jmp irq
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@ -477,7 +477,7 @@ irq5:
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nop
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nop
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nop
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nop
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rti
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rti
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lri $acl0, #0x0005
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lri $acl0, #0x0005
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jmp irq
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jmp irq
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irq6:
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irq6:
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@ -486,20 +486,20 @@ irq6:
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irq7:
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irq7:
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lri $acl0, #0x0007
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lri $acl0, #0x0007
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jmp irq
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jmp irq
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irq:
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irq:
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lrs $ACL1, @DMBH
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lrs $ACL1, @DMBH
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andcf $acl1, #0x8000
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andcf $acl1, #0x8000
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jlz irq
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jlz irq
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si @DMBH, #0x8BAD
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si @DMBH, #0x8BAD
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sr @DMBL, $r0b
|
sr @DMBL, $r0b
|
||||||
;sr @DMBL, $acl0
|
;sr @DMBL, $acl0
|
||||||
si @DIRQ, #0x0001
|
si @DIRQ, #0x0001
|
||||||
halt
|
halt
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
send_back:
|
send_back:
|
||||||
|
|
||||||
; store registers to reg table
|
; store registers to reg table
|
||||||
|
|
@ -536,7 +536,7 @@ send_back:
|
||||||
srri @$r00, $r1d
|
srri @$r00, $r1d
|
||||||
srri @$r00, $r1e
|
srri @$r00, $r1e
|
||||||
srri @$r00, $r1f
|
srri @$r00, $r1f
|
||||||
|
|
||||||
|
|
||||||
lri $r18, #0x0000
|
lri $r18, #0x0000
|
||||||
lri $r19, #1 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
|
lri $r19, #1 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
|
||||||
|
|
@ -545,7 +545,7 @@ send_back:
|
||||||
lr $r1e, @MEM_LO
|
lr $r1e, @MEM_LO
|
||||||
|
|
||||||
lri $r01, #8+8
|
lri $r01, #8+8
|
||||||
|
|
||||||
bloop $r01, dma_copy
|
bloop $r01, dma_copy
|
||||||
call do_dma
|
call do_dma
|
||||||
addi $r1e, #0x200
|
addi $r1e, #0x200
|
||||||
|
|
@ -555,19 +555,19 @@ send_back:
|
||||||
nop
|
nop
|
||||||
dma_copy:
|
dma_copy:
|
||||||
nop
|
nop
|
||||||
|
|
||||||
call wait_for_dsp_mbox
|
call wait_for_dsp_mbox
|
||||||
si @DMBH, #0x8888
|
si @DMBH, #0x8888
|
||||||
si @DMBL, #0xfeeb
|
si @DMBL, #0xfeeb
|
||||||
si @DIRQ, #0x0001
|
si @DIRQ, #0x0001
|
||||||
|
|
||||||
; wait for answer before we execute the next op
|
; wait for answer before we execute the next op
|
||||||
call wait_for_cpu_mbox
|
call wait_for_cpu_mbox
|
||||||
lrs $ACL0, @CMBL
|
lrs $ACL0, @CMBL
|
||||||
andi $acl1, #0x7fff
|
andi $acl1, #0x7fff
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
lri $r00, #REGS_BASE+1
|
lri $r00, #REGS_BASE+1
|
||||||
lrri $r01, @$r00
|
lrri $r01, @$r00
|
||||||
lrri $r02, @$r00
|
lrri $r02, @$r00
|
||||||
|
|
@ -601,39 +601,39 @@ dma_copy:
|
||||||
lrri $r1e, @$r00
|
lrri $r1e, @$r00
|
||||||
lrri $r1f, @$r00
|
lrri $r1f, @$r00
|
||||||
lr $r00, @REGS_BASE
|
lr $r00, @REGS_BASE
|
||||||
|
|
||||||
ret
|
|
||||||
|
|
||||||
send_back_16:
|
|
||||||
|
|
||||||
cw 0x8e00
|
|
||||||
call send_back
|
|
||||||
cw 0x8f00
|
|
||||||
|
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
send_back_16:
|
||||||
|
|
||||||
|
cw 0x8e00
|
||||||
|
call send_back
|
||||||
|
cw 0x8f00
|
||||||
|
|
||||||
|
ret
|
||||||
|
|
||||||
|
|
||||||
dump_memory:
|
dump_memory:
|
||||||
|
|
||||||
lri $r02, #0x0000
|
lri $r02, #0x0000
|
||||||
lri $acl0, #0x1000
|
lri $acl0, #0x1000
|
||||||
|
|
||||||
lri $r01, #0x1000
|
lri $r01, #0x1000
|
||||||
bloop $r01, _fill_loop2
|
bloop $r01, _fill_loop2
|
||||||
|
|
||||||
mrr $r03, $acl0
|
mrr $r03, $acl0
|
||||||
cw 0x80f0
|
cw 0x80f0
|
||||||
|
|
||||||
mrr $r1f, $r00
|
mrr $r1f, $r00
|
||||||
mrr $r00, $r02
|
mrr $r00, $r02
|
||||||
srri @$r00, $r1b
|
srri @$r00, $r1b
|
||||||
mrr $r02, $r00
|
mrr $r02, $r00
|
||||||
mrr $r00, $r1f
|
mrr $r00, $r1f
|
||||||
|
|
||||||
addis $acc0, #0x1
|
addis $AC0.M, #0x1
|
||||||
|
|
||||||
_fill_loop2:
|
_fill_loop2:
|
||||||
nop
|
nop
|
||||||
|
|
||||||
|
|
||||||
ret
|
|
||||||
|
ret
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue