From c79cc3f4709e5426eff34a7404452e7de25bf1e8 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 28 Dec 2016 18:45:12 -0500 Subject: [PATCH 1/2] DSP: Namespace the JIT --- Source/Core/Core/DSP/DSPCore.cpp | 6 +++--- Source/Core/Core/DSP/DSPCore.h | 11 ++++++++++- Source/Core/Core/DSP/DSPTables.cpp | 2 ++ Source/Core/Core/DSP/DSPTables.h | 2 +- Source/Core/Core/DSP/Jit/DSPEmitter.cpp | 14 ++++++++++++-- Source/Core/Core/DSP/Jit/DSPEmitter.h | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitArithmetic.cpp | 12 +++++++++--- Source/Core/Core/DSP/Jit/DSPJitBranch.cpp | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitExtOps.cpp | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitLoadStore.cpp | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitMisc.cpp | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitMultiplier.cpp | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitRegCache.cpp | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitRegCache.h | 10 ++++++++++ Source/Core/Core/DSP/Jit/DSPJitUtil.cpp | 10 ++++++++++ 16 files changed, 137 insertions(+), 10 deletions(-) diff --git a/Source/Core/Core/DSP/DSPCore.cpp b/Source/Core/Core/DSP/DSPCore.cpp index f3ff8d6642..a1e3f0361d 100644 --- a/Source/Core/Core/DSP/DSPCore.cpp +++ b/Source/Core/Core/DSP/DSPCore.cpp @@ -29,7 +29,7 @@ DSPBreakpoints g_dsp_breakpoints; static DSPCoreState core_state = DSPCORE_STOP; u16 g_cycles_left = 0; bool g_init_hax = false; -std::unique_ptr g_dsp_jit; +std::unique_ptr g_dsp_jit; std::unique_ptr g_dsp_cap; static Common::Event step_event; @@ -148,7 +148,7 @@ bool DSPCore_Init(const DSPInitOptions& opts) // Initialize JIT, if necessary if (opts.core_type == DSPInitOptions::CORE_JIT) - g_dsp_jit = std::make_unique(); + g_dsp_jit = std::make_unique(); g_dsp_cap.reset(opts.capture_logger); @@ -251,7 +251,7 @@ int DSPCore_RunCycles(int cycles) } g_cycles_left = cycles; - auto exec_addr = (DSPEmitter::DSPCompiledCode)g_dsp_jit->enterDispatcher; + auto exec_addr = (DSP::JIT::x86::DSPEmitter::DSPCompiledCode)g_dsp_jit->enterDispatcher; exec_addr(); if (g_dsp.reset_dspjit_codespace) diff --git a/Source/Core/Core/DSP/DSPCore.h b/Source/Core/Core/DSP/DSPCore.h index f53a860b97..93b58290d4 100644 --- a/Source/Core/Core/DSP/DSPCore.h +++ b/Source/Core/Core/DSP/DSPCore.h @@ -14,7 +14,16 @@ #include "Core/DSP/DSPBreakpoints.h" #include "Core/DSP/DSPCaptureLogger.h" +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ class DSPEmitter; +} +} +} enum : u32 { @@ -302,7 +311,7 @@ extern SDSP g_dsp; extern DSPBreakpoints g_dsp_breakpoints; extern u16 g_cycles_left; extern bool g_init_hax; -extern std::unique_ptr g_dsp_jit; +extern std::unique_ptr g_dsp_jit; extern std::unique_ptr g_dsp_cap; struct DSPInitOptions diff --git a/Source/Core/Core/DSP/DSPTables.cpp b/Source/Core/Core/DSP/DSPTables.cpp index 60458252d1..02bc5a7212 100644 --- a/Source/Core/Core/DSP/DSPTables.cpp +++ b/Source/Core/Core/DSP/DSPTables.cpp @@ -12,6 +12,8 @@ #include "Core/DSP/Interpreter/DSPInterpreter.h" #include "Core/DSP/Jit/DSPEmitter.h" +using DSP::JIT::x86::DSPEmitter; + // clang-format off const DSPOPCTemplate opcodes[] = { diff --git a/Source/Core/Core/DSP/DSPTables.h b/Source/Core/Core/DSP/DSPTables.h index b96d70cfdd..9bb63a0167 100644 --- a/Source/Core/Core/DSP/DSPTables.h +++ b/Source/Core/Core/DSP/DSPTables.h @@ -66,7 +66,7 @@ struct param2_t struct DSPOPCTemplate { using InterpreterFunction = void (*)(UDSPInstruction); - using JITFunction = void (DSPEmitter::*)(UDSPInstruction); + using JITFunction = void (DSP::JIT::x86::DSPEmitter::*)(UDSPInstruction); const char* name; u16 opcode; diff --git a/Source/Core/Core/DSP/Jit/DSPEmitter.cpp b/Source/Core/Core/DSP/Jit/DSPEmitter.cpp index f7beb223bd..df597cf71c 100644 --- a/Source/Core/Core/DSP/Jit/DSPEmitter.cpp +++ b/Source/Core/Core/DSP/Jit/DSPEmitter.cpp @@ -18,12 +18,18 @@ #include "Core/DSP/DSPMemoryMap.h" #include "Core/DSP/DSPTables.h" +using namespace Gen; + +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ constexpr size_t COMPILED_CODE_SIZE = 2097152; constexpr size_t MAX_BLOCK_SIZE = 250; constexpr u16 DSP_IDLE_SKIP_CYCLES = 0x1000; -using namespace Gen; - DSPEmitter::DSPEmitter() : blockLinks(MAX_BLOCKS), blockSize(MAX_BLOCKS), blocks(MAX_BLOCKS), compileSR{SR_INT_ENABLE | SR_EXT_INT_ENABLE} @@ -415,3 +421,7 @@ void DSPEmitter::CompileDispatcher() ABI_PopRegistersAndAdjustStack(registers_used, 8); RET(); } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPEmitter.h b/Source/Core/Core/DSP/Jit/DSPEmitter.h index 6eab333f0a..9c51e5b530 100644 --- a/Source/Core/Core/DSP/Jit/DSPEmitter.h +++ b/Source/Core/Core/DSP/Jit/DSPEmitter.h @@ -15,6 +15,12 @@ #include "Core/DSP/DSPCommon.h" #include "Core/DSP/Jit/DSPJitRegCache.h" +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ class DSPEmitter : public Gen::X64CodeBlock { public: @@ -281,3 +287,7 @@ private: void get_ax_h(int _reg, Gen::X64Reg acc = Gen::EAX); void get_long_acc(int _reg, Gen::X64Reg acc = Gen::EAX); }; + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitArithmetic.cpp b/Source/Core/Core/DSP/Jit/DSPJitArithmetic.cpp index b647327a92..238120215c 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitArithmetic.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitArithmetic.cpp @@ -12,6 +12,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // CLR $acR // 1000 r001 xxxx xxxx // Clears accumulator $acR @@ -1672,6 +1678,6 @@ void DSPEmitter::asrnr(const UDSPInstruction opc) } } -//} // namespace - -// +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitBranch.cpp b/Source/Core/Core/DSP/Jit/DSPJitBranch.cpp index 97e0a26a35..8bb260dcf2 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitBranch.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitBranch.cpp @@ -12,6 +12,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ template static void ReJitConditional(const UDSPInstruction opc, DSPEmitter& emitter) { @@ -452,3 +458,7 @@ void DSPEmitter::bloopi(const UDSPInstruction opc) WriteBranchExit(*this); } } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp b/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp index 3d7657a074..4a32d7a933 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitCCUtil.cpp @@ -9,6 +9,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // In: RAX: s64 _Value // Clobbers RDX void DSPEmitter::Update_SR_Register(Gen::X64Reg val) @@ -164,3 +170,7 @@ void DSPEmitter::Update_SR_Register16_OverS32(Gen::X64Reg val) // AND(32, R(val), Imm32(0xc0000000)); Update_SR_Register16(val); } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitExtOps.cpp b/Source/Core/Core/DSP/Jit/DSPJitExtOps.cpp index 1dc75e43d4..31eee39147 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitExtOps.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitExtOps.cpp @@ -25,6 +25,12 @@ using namespace Gen; sign extension. */ +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // DR $arR // xxxx xxxx 0000 01rr // Decrement addressing register $arR. @@ -691,3 +697,7 @@ void DSPEmitter::popExtValueToReg() storeIndex2 = -1; } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitLoadStore.cpp b/Source/Core/Core/DSP/Jit/DSPJitLoadStore.cpp index 645fdbcaa7..89ce0163c5 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitLoadStore.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitLoadStore.cpp @@ -13,6 +13,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // SRS @M, $(0x18+S) // 0010 1sss mmmm mmmm // Move value from register $(0x18+D) to data memory pointed by address @@ -349,3 +355,7 @@ void DSPEmitter::ilrrn(const UDSPInstruction opc) dsp_conditional_extend_accum(dreg + DSP_REG_ACM0); increase_addr_reg(reg, reg); } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitMisc.cpp b/Source/Core/Core/DSP/Jit/DSPJitMisc.cpp index 0b064047a2..b2b629d1d4 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitMisc.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitMisc.cpp @@ -11,6 +11,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // MRR $D, $S // 0001 11dd ddds ssss // Move value from register $S to register $D. @@ -191,3 +197,7 @@ void DSPEmitter::srbith(const UDSPInstruction opc) break; } } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitMultiplier.cpp b/Source/Core/Core/DSP/Jit/DSPJitMultiplier.cpp index 63047f6d83..5c6eb5cf7f 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitMultiplier.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitMultiplier.cpp @@ -13,6 +13,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // Returns s64 in RAX // In: RCX = s16 a, RAX = s16 b void DSPEmitter::multiply() @@ -770,3 +776,7 @@ void DSPEmitter::msub(const UDSPInstruction opc) // dsp_set_long_prod(prod); set_long_prod(); } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitRegCache.cpp b/Source/Core/Core/DSP/Jit/DSPJitRegCache.cpp index 63b91c424b..162352a063 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitRegCache.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitRegCache.cpp @@ -15,6 +15,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // Ordered in order of prefered use. // Not all of these are actually available const std::array DSPJitRegCache::m_allocation_order = { @@ -1008,3 +1014,7 @@ void DSPJitRegCache::PutXReg(X64Reg reg) xregs[reg].guest_reg = DSP_REG_NONE; } + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitRegCache.h b/Source/Core/Core/DSP/Jit/DSPJitRegCache.h index 8f6e33e146..2c1e3c50b8 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitRegCache.h +++ b/Source/Core/Core/DSP/Jit/DSPJitRegCache.h @@ -7,6 +7,12 @@ #include #include "Common/x64Emitter.h" +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ class DSPEmitter; enum DSPJitRegSpecial @@ -179,3 +185,7 @@ private: int use_ctr; }; + +} // namespace x86 +} // namespace JIT +} // namespace DSP diff --git a/Source/Core/Core/DSP/Jit/DSPJitUtil.cpp b/Source/Core/Core/DSP/Jit/DSPJitUtil.cpp index 9b273e619b..de953d0402 100644 --- a/Source/Core/Core/DSP/Jit/DSPJitUtil.cpp +++ b/Source/Core/Core/DSP/Jit/DSPJitUtil.cpp @@ -10,6 +10,12 @@ using namespace Gen; +namespace DSP +{ +namespace JIT +{ +namespace x86 +{ // clobbers: // EAX = (s8)g_dsp.reg_stack_ptr[stack_reg] // expects: @@ -806,3 +812,7 @@ void DSPEmitter::get_ax_h(int _reg, X64Reg axh) // return (s16)g_dsp.r[DSP_REG_AXH0 + _reg]; gpr.ReadReg(_reg + DSP_REG_AXH0, axh, SIGN); } + +} // namespace x86 +} // namespace JIT +} // namespace DSP From 2aefa29941539a47080bc33f23f765768442a9ad Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 28 Dec 2016 19:09:53 -0500 Subject: [PATCH 2/2] DSP: Add the interpreter to the DSP namespace --- Source/Core/Core/DSP/DSPCore.cpp | 10 +- Source/Core/Core/DSP/DSPDisassembler.cpp | 2 +- Source/Core/Core/DSP/DSPTables.cpp | 484 +++++++++--------- .../Core/DSP/Interpreter/DSPIntArithmetic.cpp | 7 +- .../Core/DSP/Interpreter/DSPIntBranch.cpp | 7 +- .../Core/DSP/Interpreter/DSPIntCCUtil.cpp | 7 +- .../Core/Core/DSP/Interpreter/DSPIntCCUtil.h | 7 +- .../Core/DSP/Interpreter/DSPIntExtOps.cpp | 20 +- .../Core/Core/DSP/Interpreter/DSPIntExtOps.h | 9 +- .../Core/DSP/Interpreter/DSPIntLoadStore.cpp | 7 +- .../Core/Core/DSP/Interpreter/DSPIntMisc.cpp | 7 +- .../Core/DSP/Interpreter/DSPIntMultiplier.cpp | 7 +- Source/Core/Core/DSP/Interpreter/DSPIntUtil.h | 7 + .../Core/DSP/Interpreter/DSPInterpreter.cpp | 7 +- .../Core/DSP/Interpreter/DSPInterpreter.h | 7 +- Source/Core/Core/HW/DSPLLE/DSPLLE.cpp | 8 +- 16 files changed, 322 insertions(+), 281 deletions(-) diff --git a/Source/Core/Core/DSP/DSPCore.cpp b/Source/Core/Core/DSP/DSPCore.cpp index a1e3f0361d..9ec2f3dea0 100644 --- a/Source/Core/Core/DSP/DSPCore.cpp +++ b/Source/Core/Core/DSP/DSPCore.cpp @@ -193,7 +193,7 @@ void DSPCore_SetExternalInterrupt(bool val) // Coming from the CPU void DSPCore_CheckExternalInterrupt() { - if (!dsp_SR_is_flag_set(SR_EXT_INT_ENABLE)) + if (!DSP::Interpreter::dsp_SR_is_flag_set(SR_EXT_INT_ENABLE)) return; // Signal the SPU about new mail @@ -213,7 +213,7 @@ void DSPCore_CheckExceptions() // Seems exp int are not masked by sr_int_enable if (g_dsp.exceptions & (1 << i)) { - if (dsp_SR_is_flag_set(SR_INT_ENABLE) || (i == EXP_INT)) + if (DSP::Interpreter::dsp_SR_is_flag_set(SR_INT_ENABLE) || (i == EXP_INT)) { // store pc and sr until RTI dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc); @@ -267,9 +267,9 @@ int DSPCore_RunCycles(int cycles) case DSPCORE_RUNNING: // Seems to slow things down #if defined(_DEBUG) || defined(DEBUGFAST) - cycles = DSPInterpreter::RunCyclesDebug(cycles); + cycles = DSP::Interpreter::RunCyclesDebug(cycles); #else - cycles = DSPInterpreter::RunCycles(cycles); + cycles = DSP::Interpreter::RunCycles(cycles); #endif break; @@ -278,7 +278,7 @@ int DSPCore_RunCycles(int cycles) if (core_state != DSPCORE_STEPPING) continue; - DSPInterpreter::Step(); + DSP::Interpreter::Step(); cycles--; DSPHost::UpdateDebugger(); diff --git a/Source/Core/Core/DSP/DSPDisassembler.cpp b/Source/Core/Core/DSP/DSPDisassembler.cpp index ebc6bf0954..a0362c3d02 100644 --- a/Source/Core/Core/DSP/DSPDisassembler.cpp +++ b/Source/Core/Core/DSP/DSPDisassembler.cpp @@ -194,7 +194,7 @@ bool DSPDisassembler::DisassembleOpcode(const u16* binbuf, int base_addr, int pa break; } } - const DSPOPCTemplate fake_op = {"CW", 0x0000, 0x0000, DSPInterpreter::nop, + const DSPOPCTemplate fake_op = {"CW", 0x0000, 0x0000, DSP::Interpreter::nop, nullptr, 1, 1, {{P_VAL, 2, 0, 0, 0xffff}}, false, false, false, false, false}; diff --git a/Source/Core/Core/DSP/DSPTables.cpp b/Source/Core/Core/DSP/DSPTables.cpp index 02bc5a7212..deeb432324 100644 --- a/Source/Core/Core/DSP/DSPTables.cpp +++ b/Source/Core/Core/DSP/DSPTables.cpp @@ -17,313 +17,313 @@ using DSP::JIT::x86::DSPEmitter; // clang-format off const DSPOPCTemplate opcodes[] = { - // # of parameters----+ {type, size, loc, lshift, mask} branch reads PC // instruction approximation - // name opcode mask interpreter function JIT function size-V V param 1 param 2 param 3 extendable uncond. updates SR - {"NOP", 0x0000, 0xfffc, DSPInterpreter::nop, &DSPEmitter::nop, 1, 0, {}, false, false, false, false, false}, // no operation + // # of parameters----+ {type, size, loc, lshift, mask} branch reads PC // instruction approximation + // name opcode mask interpreter function JIT function size-V V param 1 param 2 param 3 extendable uncond. updates SR + {"NOP", 0x0000, 0xfffc, DSP::Interpreter::nop, &DSPEmitter::nop, 1, 0, {}, false, false, false, false, false}, // no operation - {"DAR", 0x0004, 0xfffc, DSPInterpreter::dar, &DSPEmitter::dar, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arD-- - {"IAR", 0x0008, 0xfffc, DSPInterpreter::iar, &DSPEmitter::iar, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arD++ - {"SUBARN", 0x000c, 0xfffc, DSPInterpreter::subarn, &DSPEmitter::subarn, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arD -= $ixS - {"ADDARN", 0x0010, 0xfff0, DSPInterpreter::addarn, &DSPEmitter::addarn, 1, 2, {{P_REG, 1, 0, 0, 0x0003}, {P_REG04, 1, 0, 2, 0x000c}}, false, false, false, false, false}, // $arD += $ixS + {"DAR", 0x0004, 0xfffc, DSP::Interpreter::dar, &DSPEmitter::dar, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arD-- + {"IAR", 0x0008, 0xfffc, DSP::Interpreter::iar, &DSPEmitter::iar, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arD++ + {"SUBARN", 0x000c, 0xfffc, DSP::Interpreter::subarn, &DSPEmitter::subarn, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arD -= $ixS + {"ADDARN", 0x0010, 0xfff0, DSP::Interpreter::addarn, &DSPEmitter::addarn, 1, 2, {{P_REG, 1, 0, 0, 0x0003}, {P_REG04, 1, 0, 2, 0x000c}}, false, false, false, false, false}, // $arD += $ixS - {"HALT", 0x0021, 0xffff, DSPInterpreter::halt, &DSPEmitter::halt, 1, 0, {}, false, true, true, false, false}, // halt until reset + {"HALT", 0x0021, 0xffff, DSP::Interpreter::halt, &DSPEmitter::halt, 1, 0, {}, false, true, true, false, false}, // halt until reset - {"RETGE", 0x02d0, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if greater or equal - {"RETL", 0x02d1, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if less - {"RETG", 0x02d2, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if greater - {"RETLE", 0x02d3, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if less or equal - {"RETNZ", 0x02d4, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if not zero - {"RETZ", 0x02d5, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if zero - {"RETNC", 0x02d6, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if not carry - {"RETC", 0x02d7, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if carry - {"RETx8", 0x02d8, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO - {"RETx9", 0x02d9, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO - {"RETxA", 0x02da, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO - {"RETxB", 0x02db, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO - {"RETLNZ", 0x02dc, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if logic not zero - {"RETLZ", 0x02dd, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if logic zero - {"RETO", 0x02de, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if overflow - {"RET", 0x02df, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, true, false, false}, // unconditional return + {"RETGE", 0x02d0, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if greater or equal + {"RETL", 0x02d1, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if less + {"RETG", 0x02d2, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if greater + {"RETLE", 0x02d3, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if less or equal + {"RETNZ", 0x02d4, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if not zero + {"RETZ", 0x02d5, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if zero + {"RETNC", 0x02d6, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if not carry + {"RETC", 0x02d7, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if carry + {"RETx8", 0x02d8, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO + {"RETx9", 0x02d9, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO + {"RETxA", 0x02da, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO + {"RETxB", 0x02db, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if TODO + {"RETLNZ", 0x02dc, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if logic not zero + {"RETLZ", 0x02dd, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if logic zero + {"RETO", 0x02de, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false}, // return if overflow + {"RET", 0x02df, 0xffff, DSP::Interpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, true, false, false}, // unconditional return - {"RTI", 0x02ff, 0xffff, DSPInterpreter::rti, &DSPEmitter::rti, 1, 0, {}, false, true, true, false, false}, // return from interrupt + {"RTI", 0x02ff, 0xffff, DSP::Interpreter::rti, &DSPEmitter::rti, 1, 0, {}, false, true, true, false, false}, // return from interrupt - {"CALLGE", 0x02b0, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if greater or equal - {"CALLL", 0x02b1, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if less - {"CALLG", 0x02b2, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if greater - {"CALLLE", 0x02b3, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if less or equal - {"CALLNZ", 0x02b4, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if not zero - {"CALLZ", 0x02b5, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if zero - {"CALLNC", 0x02b6, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if not carry - {"CALLC", 0x02b7, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if carry - {"CALLx8", 0x02b8, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO - {"CALLx9", 0x02b9, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO - {"CALLxA", 0x02ba, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO - {"CALLxB", 0x02bb, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO - {"CALLLNZ", 0x02bc, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if logic not zero - {"CALLLZ", 0x02bd, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if logic zero - {"CALLO", 0x02be, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if overflow - {"CALL", 0x02bf, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // unconditional call + {"CALLGE", 0x02b0, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if greater or equal + {"CALLL", 0x02b1, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if less + {"CALLG", 0x02b2, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if greater + {"CALLLE", 0x02b3, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if less or equal + {"CALLNZ", 0x02b4, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if not zero + {"CALLZ", 0x02b5, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if zero + {"CALLNC", 0x02b6, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if not carry + {"CALLC", 0x02b7, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if carry + {"CALLx8", 0x02b8, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO + {"CALLx9", 0x02b9, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO + {"CALLxA", 0x02ba, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO + {"CALLxB", 0x02bb, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if TODO + {"CALLLNZ", 0x02bc, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if logic not zero + {"CALLLZ", 0x02bd, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if logic zero + {"CALLO", 0x02be, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // call if overflow + {"CALL", 0x02bf, 0xffff, DSP::Interpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // unconditional call - {"IFGE", 0x0270, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if greater or equal - {"IFL", 0x0271, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if less - {"IFG", 0x0272, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if greater - {"IFLE", 0x0273, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if less or equal - {"IFNZ", 0x0274, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if not zero - {"IFZ", 0x0275, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if zero - {"IFNC", 0x0276, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if not carry - {"IFC", 0x0277, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if carry - {"IFx8", 0x0278, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO - {"IFx9", 0x0279, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO - {"IFxA", 0x027a, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO - {"IFxB", 0x027b, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO - {"IFLNZ", 0x027c, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if logic not zero - {"IFLZ", 0x027d, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if logic zero - {"IFO", 0x027e, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if overflow - {"IF", 0x027f, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, true, true, false}, // what is this, I don't even... + {"IFGE", 0x0270, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if greater or equal + {"IFL", 0x0271, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if less + {"IFG", 0x0272, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if greater + {"IFLE", 0x0273, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if less or equal + {"IFNZ", 0x0274, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if not zero + {"IFZ", 0x0275, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if zero + {"IFNC", 0x0276, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if not carry + {"IFC", 0x0277, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if carry + {"IFx8", 0x0278, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO + {"IFx9", 0x0279, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO + {"IFxA", 0x027a, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO + {"IFxB", 0x027b, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if TODO + {"IFLNZ", 0x027c, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if logic not zero + {"IFLZ", 0x027d, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if logic zero + {"IFO", 0x027e, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false}, // if overflow + {"IF", 0x027f, 0xffff, DSP::Interpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, true, true, false}, // what is this, I don't even... - {"JGE", 0x0290, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if greater or equal - {"JL", 0x0291, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if less - {"JG", 0x0292, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if greater - {"JLE", 0x0293, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if less or equal - {"JNZ", 0x0294, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if not zero - {"JZ", 0x0295, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if zero - {"JNC", 0x0296, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if not carry - {"JC", 0x0297, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if carry - {"JMPx8", 0x0298, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO - {"JMPx9", 0x0299, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO - {"JMPxA", 0x029a, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO - {"JMPxB", 0x029b, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO - {"JLNZ", 0x029c, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if logic not zero - {"JLZ", 0x029d, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if logic zero - {"JO", 0x029e, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if overflow - {"JMP", 0x029f, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // unconditional jump + {"JGE", 0x0290, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if greater or equal + {"JL", 0x0291, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if less + {"JG", 0x0292, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if greater + {"JLE", 0x0293, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if less or equal + {"JNZ", 0x0294, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if not zero + {"JZ", 0x0295, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if zero + {"JNC", 0x0296, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if not carry + {"JC", 0x0297, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if carry + {"JMPx8", 0x0298, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO + {"JMPx9", 0x0299, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO + {"JMPxA", 0x029a, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO + {"JMPxB", 0x029b, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if TODO + {"JLNZ", 0x029c, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if logic not zero + {"JLZ", 0x029d, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if logic zero + {"JO", 0x029e, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false}, // jump if overflow + {"JMP", 0x029f, 0xffff, DSP::Interpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // unconditional jump - {"JRGE", 0x1700, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if greater or equal - {"JRL", 0x1701, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if less - {"JRG", 0x1702, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if greater - {"JRLE", 0x1703, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if less or equal - {"JRNZ", 0x1704, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if not zero - {"JRZ", 0x1705, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if zero - {"JRNC", 0x1706, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if not carry - {"JRC", 0x1707, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if carry - {"JMPRx8", 0x1708, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO - {"JMPRx9", 0x1709, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO - {"JMPRxA", 0x170a, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO - {"JMPRxB", 0x170b, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO - {"JRLNZ", 0x170c, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if logic not zero - {"JRLZ", 0x170d, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if logic zero - {"JRO", 0x170e, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if overflow - {"JMPR", 0x170f, 0xff1f, DSPInterpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, true, false, false}, // jump to $R + {"JRGE", 0x1700, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if greater or equal + {"JRL", 0x1701, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if less + {"JRG", 0x1702, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if greater + {"JRLE", 0x1703, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if less or equal + {"JRNZ", 0x1704, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if not zero + {"JRZ", 0x1705, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if zero + {"JRNC", 0x1706, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if not carry + {"JRC", 0x1707, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if carry + {"JMPRx8", 0x1708, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO + {"JMPRx9", 0x1709, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO + {"JMPRxA", 0x170a, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO + {"JMPRxB", 0x170b, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if TODO + {"JRLNZ", 0x170c, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if logic not zero + {"JRLZ", 0x170d, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if logic zero + {"JRO", 0x170e, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, false, false}, // jump to $R if overflow + {"JMPR", 0x170f, 0xff1f, DSP::Interpreter::jmprcc, &DSPEmitter::jmprcc, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, true, false, false}, // jump to $R - {"CALLRGE", 0x1710, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if greater or equal - {"CALLRL", 0x1711, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if less - {"CALLRG", 0x1712, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if greater - {"CALLRLE", 0x1713, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if less or equal - {"CALLRNZ", 0x1714, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if not zero - {"CALLRZ", 0x1715, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if zero - {"CALLRNC", 0x1716, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if not carry - {"CALLRC", 0x1717, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if carry - {"CALLRx8", 0x1718, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO - {"CALLRx9", 0x1719, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO - {"CALLRxA", 0x171a, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO - {"CALLRxB", 0x171b, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO - {"CALLRLNZ", 0x171c, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if logic not zero - {"CALLRLZ", 0x171d, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if logic zero - {"CALLRO", 0x171e, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if overflow - {"CALLR", 0x171f, 0xff1f, DSPInterpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, true, true, false}, // call $R + {"CALLRGE", 0x1710, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if greater or equal + {"CALLRL", 0x1711, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if less + {"CALLRG", 0x1712, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if greater + {"CALLRLE", 0x1713, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if less or equal + {"CALLRNZ", 0x1714, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if not zero + {"CALLRZ", 0x1715, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if zero + {"CALLRNC", 0x1716, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if not carry + {"CALLRC", 0x1717, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if carry + {"CALLRx8", 0x1718, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO + {"CALLRx9", 0x1719, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO + {"CALLRxA", 0x171a, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO + {"CALLRxB", 0x171b, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if TODO + {"CALLRLNZ", 0x171c, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if logic not zero + {"CALLRLZ", 0x171d, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if logic zero + {"CALLRO", 0x171e, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, false, true, false}, // call $R if overflow + {"CALLR", 0x171f, 0xff1f, DSP::Interpreter::callr, &DSPEmitter::callr, 1, 1, {{P_REG, 1, 0, 5, 0x00e0}}, false, true, true, true, false}, // call $R - {"SBCLR", 0x1200, 0xff00, DSPInterpreter::sbclr, &DSPEmitter::sbclr, 1, 1, {{P_IMM, 1, 0, 0, 0x0007}}, false, false, false, false, false}, // $sr &= ~(I + 6) - {"SBSET", 0x1300, 0xff00, DSPInterpreter::sbset, &DSPEmitter::sbset, 1, 1, {{P_IMM, 1, 0, 0, 0x0007}}, false, false, false, false, false}, // $sr |= (I + 6) + {"SBCLR", 0x1200, 0xff00, DSP::Interpreter::sbclr, &DSPEmitter::sbclr, 1, 1, {{P_IMM, 1, 0, 0, 0x0007}}, false, false, false, false, false}, // $sr &= ~(I + 6) + {"SBSET", 0x1300, 0xff00, DSP::Interpreter::sbset, &DSPEmitter::sbset, 1, 1, {{P_IMM, 1, 0, 0, 0x0007}}, false, false, false, false, false}, // $sr |= (I + 6) - {"LSL", 0x1400, 0xfec0, DSPInterpreter::lsl, &DSPEmitter::lsl, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR <<= I - {"LSR", 0x1440, 0xfec0, DSPInterpreter::lsr, &DSPEmitter::lsr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR >>= I (shifting in zeros) - {"ASL", 0x1480, 0xfec0, DSPInterpreter::asl, &DSPEmitter::asl, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR <<= I - {"ASR", 0x14c0, 0xfec0, DSPInterpreter::asr, &DSPEmitter::asr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR >>= I (shifting in sign bits) + {"LSL", 0x1400, 0xfec0, DSP::Interpreter::lsl, &DSPEmitter::lsl, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR <<= I + {"LSR", 0x1440, 0xfec0, DSP::Interpreter::lsr, &DSPEmitter::lsr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR >>= I (shifting in zeros) + {"ASL", 0x1480, 0xfec0, DSP::Interpreter::asl, &DSPEmitter::asl, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR <<= I + {"ASR", 0x14c0, 0xfec0, DSP::Interpreter::asr, &DSPEmitter::asr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true}, // $acR >>= I (shifting in sign bits) // these two were discovered by ector - {"LSRN", 0x02ca, 0xffff, DSPInterpreter::lsrn, &DSPEmitter::lsrn, 1, 0, {}, false, false, false, false, true}, // $ac0 >>=/<<= $ac1.m[0-6] - {"ASRN", 0x02cb, 0xffff, DSPInterpreter::asrn, &DSPEmitter::asrn, 1, 0, {}, false, false, false, false, true}, // $ac0 >>=/<<= $ac1.m[0-6] (arithmetic) + {"LSRN", 0x02ca, 0xffff, DSP::Interpreter::lsrn, &DSPEmitter::lsrn, 1, 0, {}, false, false, false, false, true}, // $ac0 >>=/<<= $ac1.m[0-6] + {"ASRN", 0x02cb, 0xffff, DSP::Interpreter::asrn, &DSPEmitter::asrn, 1, 0, {}, false, false, false, false, true}, // $ac0 >>=/<<= $ac1.m[0-6] (arithmetic) - {"LRI", 0x0080, 0xffe0, DSPInterpreter::lri, &DSPEmitter::lri, 2, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, false}, // $D = I - {"LR", 0x00c0, 0xffe0, DSPInterpreter::lr, &DSPEmitter::lr, 2, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_MEM, 2, 1, 0, 0xffff}}, false, false, false, true, false}, // $D = MEM[M] - {"SR", 0x00e0, 0xffe0, DSPInterpreter::sr, &DSPEmitter::sr, 2, 2, {{P_MEM, 2, 1, 0, 0xffff}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, true, false}, // MEM[M] = $S + {"LRI", 0x0080, 0xffe0, DSP::Interpreter::lri, &DSPEmitter::lri, 2, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, false}, // $D = I + {"LR", 0x00c0, 0xffe0, DSP::Interpreter::lr, &DSPEmitter::lr, 2, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_MEM, 2, 1, 0, 0xffff}}, false, false, false, true, false}, // $D = MEM[M] + {"SR", 0x00e0, 0xffe0, DSP::Interpreter::sr, &DSPEmitter::sr, 2, 2, {{P_MEM, 2, 1, 0, 0xffff}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, true, false}, // MEM[M] = $S - {"MRR", 0x1c00, 0xfc00, DSPInterpreter::mrr, &DSPEmitter::mrr, 1, 2, {{P_REG, 1, 0, 5, 0x03e0}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // $D = $S + {"MRR", 0x1c00, 0xfc00, DSP::Interpreter::mrr, &DSPEmitter::mrr, 1, 2, {{P_REG, 1, 0, 5, 0x03e0}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // $D = $S - {"SI", 0x1600, 0xff00, DSPInterpreter::si, &DSPEmitter::si, 2, 2, {{P_MEM, 1, 0, 0, 0x00ff}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, false}, // MEM[M] = I + {"SI", 0x1600, 0xff00, DSP::Interpreter::si, &DSPEmitter::si, 2, 2, {{P_MEM, 1, 0, 0, 0x00ff}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, false}, // MEM[M] = I - {"ADDIS", 0x0400, 0xfe00, DSPInterpreter::addis, &DSPEmitter::addis, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x00ff}}, false, false, false, false, true}, // $acD.hm += I - {"CMPIS", 0x0600, 0xfe00, DSPInterpreter::cmpis, &DSPEmitter::cmpis, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x00ff}}, false, false, false, false, true}, // FLAGS($acD - I) - {"LRIS", 0x0800, 0xf800, DSPInterpreter::lris, &DSPEmitter::lris, 1, 2, {{P_REG18, 1, 0, 8, 0x0700}, {P_IMM, 1, 0, 0, 0x00ff}}, false, false, false, false, true}, // $(D+24) = I + {"ADDIS", 0x0400, 0xfe00, DSP::Interpreter::addis, &DSPEmitter::addis, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x00ff}}, false, false, false, false, true}, // $acD.hm += I + {"CMPIS", 0x0600, 0xfe00, DSP::Interpreter::cmpis, &DSPEmitter::cmpis, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x00ff}}, false, false, false, false, true}, // FLAGS($acD - I) + {"LRIS", 0x0800, 0xf800, DSP::Interpreter::lris, &DSPEmitter::lris, 1, 2, {{P_REG18, 1, 0, 8, 0x0700}, {P_IMM, 1, 0, 0, 0x00ff}}, false, false, false, false, true}, // $(D+24) = I - {"ADDI", 0x0200, 0xfeff, DSPInterpreter::addi, &DSPEmitter::addi, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.hm += I - {"XORI", 0x0220, 0xfeff, DSPInterpreter::xori, &DSPEmitter::xori, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.m ^= I - {"ANDI", 0x0240, 0xfeff, DSPInterpreter::andi, &DSPEmitter::andi, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.m &= I - {"ORI", 0x0260, 0xfeff, DSPInterpreter::ori, &DSPEmitter::ori, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.m |= I - {"CMPI", 0x0280, 0xfeff, DSPInterpreter::cmpi, &DSPEmitter::cmpi, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // FLAGS(($acD.hm - I) | $acD.l) + {"ADDI", 0x0200, 0xfeff, DSP::Interpreter::addi, &DSPEmitter::addi, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.hm += I + {"XORI", 0x0220, 0xfeff, DSP::Interpreter::xori, &DSPEmitter::xori, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.m ^= I + {"ANDI", 0x0240, 0xfeff, DSP::Interpreter::andi, &DSPEmitter::andi, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.m &= I + {"ORI", 0x0260, 0xfeff, DSP::Interpreter::ori, &DSPEmitter::ori, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $acD.m |= I + {"CMPI", 0x0280, 0xfeff, DSP::Interpreter::cmpi, &DSPEmitter::cmpi, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // FLAGS(($acD.hm - I) | $acD.l) - {"ANDF", 0x02a0, 0xfeff, DSPInterpreter::andf, &DSPEmitter::andf, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $sr.LZ = ($acD.m & I) == 0 ? 1 : 0 - {"ANDCF", 0x02c0, 0xfeff, DSPInterpreter::andcf, &DSPEmitter::andcf, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $sr.LZ = ($acD.m & I) == I ? 1 : 0 + {"ANDF", 0x02a0, 0xfeff, DSP::Interpreter::andf, &DSPEmitter::andf, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $sr.LZ = ($acD.m & I) == 0 ? 1 : 0 + {"ANDCF", 0x02c0, 0xfeff, DSP::Interpreter::andcf, &DSPEmitter::andcf, 2, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, false, false, false, true, true}, // $sr.LZ = ($acD.m & I) == I ? 1 : 0 - {"ILRR", 0x0210, 0xfefc, DSPInterpreter::ilrr, &DSPEmitter::ilrr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS] - {"ILRRD", 0x0214, 0xfefc, DSPInterpreter::ilrrd, &DSPEmitter::ilrrd, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS--] - {"ILRRI", 0x0218, 0xfefc, DSPInterpreter::ilrri, &DSPEmitter::ilrri, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS++] - {"ILRRN", 0x021c, 0xfefc, DSPInterpreter::ilrrn, &DSPEmitter::ilrrn, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS]; $arS += $ixS + {"ILRR", 0x0210, 0xfefc, DSP::Interpreter::ilrr, &DSPEmitter::ilrr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS] + {"ILRRD", 0x0214, 0xfefc, DSP::Interpreter::ilrrd, &DSPEmitter::ilrrd, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS--] + {"ILRRI", 0x0218, 0xfefc, DSP::Interpreter::ilrri, &DSPEmitter::ilrri, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS++] + {"ILRRN", 0x021c, 0xfefc, DSP::Interpreter::ilrrn, &DSPEmitter::ilrrn, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $acD.m = IMEM[$arS]; $arS += $ixS // LOOPS - {"LOOP", 0x0040, 0xffe0, DSPInterpreter::loop, &DSPEmitter::loop, 1, 1, {{P_REG, 1, 0, 0, 0x001f}}, false, true, true, true, false}, // run next instruction $R times - {"BLOOP", 0x0060, 0xffe0, DSPInterpreter::bloop, &DSPEmitter::bloop, 2, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // COMEFROM addr $R times - {"LOOPI", 0x1000, 0xff00, DSPInterpreter::loopi, &DSPEmitter::loopi, 1, 1, {{P_IMM, 1, 0, 0, 0x00ff}}, false, true, true, true, false}, // run next instruction I times - {"BLOOPI", 0x1100, 0xff00, DSPInterpreter::bloopi, &DSPEmitter::bloopi, 2, 2, {{P_IMM, 1, 0, 0, 0x00ff}, {P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // COMEFROM addr I times + {"LOOP", 0x0040, 0xffe0, DSP::Interpreter::loop, &DSPEmitter::loop, 1, 1, {{P_REG, 1, 0, 0, 0x001f}}, false, true, true, true, false}, // run next instruction $R times + {"BLOOP", 0x0060, 0xffe0, DSP::Interpreter::bloop, &DSPEmitter::bloop, 2, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // COMEFROM addr $R times + {"LOOPI", 0x1000, 0xff00, DSP::Interpreter::loopi, &DSPEmitter::loopi, 1, 1, {{P_IMM, 1, 0, 0, 0x00ff}}, false, true, true, true, false}, // run next instruction I times + {"BLOOPI", 0x1100, 0xff00, DSP::Interpreter::bloopi, &DSPEmitter::bloopi, 2, 2, {{P_IMM, 1, 0, 0, 0x00ff}, {P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false}, // COMEFROM addr I times // load and store value pointed by indexing reg and increment; LRR/SRR variants - {"LRR", 0x1800, 0xff80, DSPInterpreter::lrr, &DSPEmitter::lrr, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS] - {"LRRD", 0x1880, 0xff80, DSPInterpreter::lrrd, &DSPEmitter::lrrd, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS--] - {"LRRI", 0x1900, 0xff80, DSPInterpreter::lrri, &DSPEmitter::lrri, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS++] - {"LRRN", 0x1980, 0xff80, DSPInterpreter::lrrn, &DSPEmitter::lrrn, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS]; $arS += $ixS + {"LRR", 0x1800, 0xff80, DSP::Interpreter::lrr, &DSPEmitter::lrr, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS] + {"LRRD", 0x1880, 0xff80, DSP::Interpreter::lrrd, &DSPEmitter::lrrd, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS--] + {"LRRI", 0x1900, 0xff80, DSP::Interpreter::lrri, &DSPEmitter::lrri, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS++] + {"LRRN", 0x1980, 0xff80, DSP::Interpreter::lrrn, &DSPEmitter::lrrn, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, false, false, false, false, false}, // $D = MEM[$arS]; $arS += $ixS - {"SRR", 0x1a00, 0xff80, DSPInterpreter::srr, &DSPEmitter::srr, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD] = $S - {"SRRD", 0x1a80, 0xff80, DSPInterpreter::srrd, &DSPEmitter::srrd, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD--] = $S - {"SRRI", 0x1b00, 0xff80, DSPInterpreter::srri, &DSPEmitter::srri, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD++] = $S - {"SRRN", 0x1b80, 0xff80, DSPInterpreter::srrn, &DSPEmitter::srrn, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD] = $S; $arD += $ixD + {"SRR", 0x1a00, 0xff80, DSP::Interpreter::srr, &DSPEmitter::srr, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD] = $S + {"SRRD", 0x1a80, 0xff80, DSP::Interpreter::srrd, &DSPEmitter::srrd, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD--] = $S + {"SRRI", 0x1b00, 0xff80, DSP::Interpreter::srri, &DSPEmitter::srri, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD++] = $S + {"SRRN", 0x1b80, 0xff80, DSP::Interpreter::srrn, &DSPEmitter::srrn, 1, 2, {{P_PRG, 1, 0, 5, 0x0060}, {P_REG, 1, 0, 0, 0x001f}}, false, false, false, false, false}, // MEM[$arD] = $S; $arD += $ixD //2 - {"LRS", 0x2000, 0xf800, DSPInterpreter::lrs, &DSPEmitter::lrs, 1, 2, {{P_REG18, 1, 0, 8, 0x0700}, {P_MEM, 1, 0, 0, 0x00ff}}, false, false, false, false, false}, // $(D+24) = MEM[($cr[0-7] << 8) | I] - {"SRS", 0x2800, 0xf800, DSPInterpreter::srs, &DSPEmitter::srs, 1, 2, {{P_MEM, 1, 0, 0, 0x00ff}, {P_REG18, 1, 0, 8, 0x0700}}, false, false, false, false, false}, // MEM[($cr[0-7] << 8) | I] = $(S+24) + {"LRS", 0x2000, 0xf800, DSP::Interpreter::lrs, &DSPEmitter::lrs, 1, 2, {{P_REG18, 1, 0, 8, 0x0700}, {P_MEM, 1, 0, 0, 0x00ff}}, false, false, false, false, false}, // $(D+24) = MEM[($cr[0-7] << 8) | I] + {"SRS", 0x2800, 0xf800, DSP::Interpreter::srs, &DSPEmitter::srs, 1, 2, {{P_MEM, 1, 0, 0, 0x00ff}, {P_REG18, 1, 0, 8, 0x0700}}, false, false, false, false, false}, // MEM[($cr[0-7] << 8) | I] = $(S+24) // opcodes that can be extended //3 - main opcode defined by 9 bits, extension defined by last 7 bits!! - {"XORR", 0x3000, 0xfc80, DSPInterpreter::xorr, &DSPEmitter::xorr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD.m ^= $axS.h - {"ANDR", 0x3400, 0xfc80, DSPInterpreter::andr, &DSPEmitter::andr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD.m &= $axS.h - {"ORR", 0x3800, 0xfc80, DSPInterpreter::orr, &DSPEmitter::orr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD.m |= $axS.h - {"ANDC", 0x3c00, 0xfe80, DSPInterpreter::andc, &DSPEmitter::andc, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m &= $ac(1-D).m - {"ORC", 0x3e00, 0xfe80, DSPInterpreter::orc, &DSPEmitter::orc, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m |= $ac(1-D).m - {"XORC", 0x3080, 0xfe80, DSPInterpreter::xorc, &DSPEmitter::xorc, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m ^= $ac(1-D).m - {"NOT", 0x3280, 0xfe80, DSPInterpreter::notc, &DSPEmitter::notc, 1, 1, {{P_ACCM, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m = ~$acD.m - {"LSRNRX", 0x3480, 0xfc80, DSPInterpreter::lsrnrx, &DSPEmitter::lsrnrx, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD >>=/<<= $axS.h[0-6] - {"ASRNRX", 0x3880, 0xfc80, DSPInterpreter::asrnrx, &DSPEmitter::asrnrx, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD >>=/<<= $axS.h[0-6] (arithmetic) - {"LSRNR", 0x3c80, 0xfe80, DSPInterpreter::lsrnr, &DSPEmitter::lsrnr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD >>=/<<= $ac(1-D).m[0-6] - {"ASRNR", 0x3e80, 0xfe80, DSPInterpreter::asrnr, &DSPEmitter::asrnr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD >>=/<<= $ac(1-D).m[0-6] (arithmetic) + {"XORR", 0x3000, 0xfc80, DSP::Interpreter::xorr, &DSPEmitter::xorr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD.m ^= $axS.h + {"ANDR", 0x3400, 0xfc80, DSP::Interpreter::andr, &DSPEmitter::andr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD.m &= $axS.h + {"ORR", 0x3800, 0xfc80, DSP::Interpreter::orr, &DSPEmitter::orr, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD.m |= $axS.h + {"ANDC", 0x3c00, 0xfe80, DSP::Interpreter::andc, &DSPEmitter::andc, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m &= $ac(1-D).m + {"ORC", 0x3e00, 0xfe80, DSP::Interpreter::orc, &DSPEmitter::orc, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m |= $ac(1-D).m + {"XORC", 0x3080, 0xfe80, DSP::Interpreter::xorc, &DSPEmitter::xorc, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m ^= $ac(1-D).m + {"NOT", 0x3280, 0xfe80, DSP::Interpreter::notc, &DSPEmitter::notc, 1, 1, {{P_ACCM, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.m = ~$acD.m + {"LSRNRX", 0x3480, 0xfc80, DSP::Interpreter::lsrnrx, &DSPEmitter::lsrnrx, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD >>=/<<= $axS.h[0-6] + {"ASRNRX", 0x3880, 0xfc80, DSP::Interpreter::asrnrx, &DSPEmitter::asrnrx, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD >>=/<<= $axS.h[0-6] (arithmetic) + {"LSRNR", 0x3c80, 0xfe80, DSP::Interpreter::lsrnr, &DSPEmitter::lsrnr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD >>=/<<= $ac(1-D).m[0-6] + {"ASRNR", 0x3e80, 0xfe80, DSP::Interpreter::asrnr, &DSPEmitter::asrnr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACCM_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD >>=/<<= $ac(1-D).m[0-6] (arithmetic) //4 - {"ADDR", 0x4000, 0xf800, DSPInterpreter::addr, &DSPEmitter::addr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, true, false, false, false, true}, // $acD += $(S+24) - {"ADDAX", 0x4800, 0xfc00, DSPInterpreter::addax, &DSPEmitter::addax, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_AX, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD += $axS - {"ADD", 0x4c00, 0xfe00, DSPInterpreter::add, &DSPEmitter::add, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD += $ac(1-D) - {"ADDP", 0x4e00, 0xfe00, DSPInterpreter::addp, &DSPEmitter::addp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD += $prod + {"ADDR", 0x4000, 0xf800, DSP::Interpreter::addr, &DSPEmitter::addr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, true, false, false, false, true}, // $acD += $(S+24) + {"ADDAX", 0x4800, 0xfc00, DSP::Interpreter::addax, &DSPEmitter::addax, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_AX, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD += $axS + {"ADD", 0x4c00, 0xfe00, DSP::Interpreter::add, &DSPEmitter::add, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD += $ac(1-D) + {"ADDP", 0x4e00, 0xfe00, DSP::Interpreter::addp, &DSPEmitter::addp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD += $prod //5 - {"SUBR", 0x5000, 0xf800, DSPInterpreter::subr, &DSPEmitter::subr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, true, false, false, false, true}, // $acD -= $(S+24) - {"SUBAX", 0x5800, 0xfc00, DSPInterpreter::subax, &DSPEmitter::subax, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_AX, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD -= $axS - {"SUB", 0x5c00, 0xfe00, DSPInterpreter::sub, &DSPEmitter::sub, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD -= $ac(1-D) - {"SUBP", 0x5e00, 0xfe00, DSPInterpreter::subp, &DSPEmitter::subp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD -= $prod + {"SUBR", 0x5000, 0xf800, DSP::Interpreter::subr, &DSPEmitter::subr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, true, false, false, false, true}, // $acD -= $(S+24) + {"SUBAX", 0x5800, 0xfc00, DSP::Interpreter::subax, &DSPEmitter::subax, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_AX, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD -= $axS + {"SUB", 0x5c00, 0xfe00, DSP::Interpreter::sub, &DSPEmitter::sub, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD -= $ac(1-D) + {"SUBP", 0x5e00, 0xfe00, DSP::Interpreter::subp, &DSPEmitter::subp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD -= $prod //6 - {"MOVR", 0x6000, 0xf800, DSPInterpreter::movr, &DSPEmitter::movr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, true, false, false, false, true}, // $acD.hm = $(S+24); $acD.l = 0 - {"MOVAX", 0x6800, 0xfc00, DSPInterpreter::movax, &DSPEmitter::movax, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_AX, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD = $axS - {"MOV", 0x6c00, 0xfe00, DSPInterpreter::mov, &DSPEmitter::mov, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = $ax(1-D) - {"MOVP", 0x6e00, 0xfe00, DSPInterpreter::movp, &DSPEmitter::movp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = $prod + {"MOVR", 0x6000, 0xf800, DSP::Interpreter::movr, &DSPEmitter::movr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, true, false, false, false, true}, // $acD.hm = $(S+24); $acD.l = 0 + {"MOVAX", 0x6800, 0xfc00, DSP::Interpreter::movax, &DSPEmitter::movax, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_AX, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD = $axS + {"MOV", 0x6c00, 0xfe00, DSP::Interpreter::mov, &DSPEmitter::mov, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = $ax(1-D) + {"MOVP", 0x6e00, 0xfe00, DSP::Interpreter::movp, &DSPEmitter::movp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = $prod //7 - {"ADDAXL", 0x7000, 0xfc00, DSPInterpreter::addaxl, &DSPEmitter::addaxl, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD += $axS.l - {"INCM", 0x7400, 0xfe00, DSPInterpreter::incm, &DSPEmitter::incm, 1, 1, {{P_ACCM, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acsD++ - {"INC", 0x7600, 0xfe00, DSPInterpreter::inc, &DSPEmitter::inc, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD++ - {"DECM", 0x7800, 0xfe00, DSPInterpreter::decm, &DSPEmitter::decm, 1, 1, {{P_ACCM, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acsD-- - {"DEC", 0x7a00, 0xfe00, DSPInterpreter::dec, &DSPEmitter::dec, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD-- - {"NEG", 0x7c00, 0xfe00, DSPInterpreter::neg, &DSPEmitter::neg, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = -$acD - {"MOVNP", 0x7e00, 0xfe00, DSPInterpreter::movnp, &DSPEmitter::movnp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = -$prod + {"ADDAXL", 0x7000, 0xfc00, DSP::Interpreter::addaxl, &DSPEmitter::addaxl, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0200}}, true, false, false, false, true}, // $acD += $axS.l + {"INCM", 0x7400, 0xfe00, DSP::Interpreter::incm, &DSPEmitter::incm, 1, 1, {{P_ACCM, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acsD++ + {"INC", 0x7600, 0xfe00, DSP::Interpreter::inc, &DSPEmitter::inc, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD++ + {"DECM", 0x7800, 0xfe00, DSP::Interpreter::decm, &DSPEmitter::decm, 1, 1, {{P_ACCM, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acsD-- + {"DEC", 0x7a00, 0xfe00, DSP::Interpreter::dec, &DSPEmitter::dec, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD-- + {"NEG", 0x7c00, 0xfe00, DSP::Interpreter::neg, &DSPEmitter::neg, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = -$acD + {"MOVNP", 0x7e00, 0xfe00, DSP::Interpreter::movnp, &DSPEmitter::movnp, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD = -$prod //8 - {"NX", 0x8000, 0xf700, DSPInterpreter::nx, &DSPEmitter::nx, 1, 0, {}, true, false, false, false, false}, // extendable nop - {"CLR", 0x8100, 0xf700, DSPInterpreter::clr, &DSPEmitter::clr, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acD = 0 - {"CMP", 0x8200, 0xff00, DSPInterpreter::cmp, &DSPEmitter::cmp, 1, 0, {}, true, false, false, false, true}, // FLAGS($ac0 - $ac1) - {"MULAXH", 0x8300, 0xff00, DSPInterpreter::mulaxh, &DSPEmitter::mulaxh, 1, 0, {}, true, false, false, false, true}, // $prod = $ax0.h * $ax0.h - {"CLRP", 0x8400, 0xff00, DSPInterpreter::clrp, &DSPEmitter::clrp, 1, 0, {}, true, false, false, false, true}, // $prod = 0 - {"TSTPROD", 0x8500, 0xff00, DSPInterpreter::tstprod, &DSPEmitter::tstprod,1, 0, {}, true, false, false, false, true}, // FLAGS($prod) - {"TSTAXH", 0x8600, 0xfe00, DSPInterpreter::tstaxh, &DSPEmitter::tstaxh, 1, 1, {{P_REG1A, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // FLAGS($axR.h) - {"M2", 0x8a00, 0xff00, DSPInterpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // enable "$prod *= 2" after every multiplication - {"M0", 0x8b00, 0xff00, DSPInterpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // disable "$prod *= 2" after every multiplication - {"CLR15", 0x8c00, 0xff00, DSPInterpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set normal multiplication - {"SET15", 0x8d00, 0xff00, DSPInterpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set unsigned multiplication in MUL - {"SET16", 0x8e00, 0xff00, DSPInterpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set 16 bit sign extension width - {"SET40", 0x8f00, 0xff00, DSPInterpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set 40 bit sign extension width + {"NX", 0x8000, 0xf700, DSP::Interpreter::nx, &DSPEmitter::nx, 1, 0, {}, true, false, false, false, false}, // extendable nop + {"CLR", 0x8100, 0xf700, DSP::Interpreter::clr, &DSPEmitter::clr, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acD = 0 + {"CMP", 0x8200, 0xff00, DSP::Interpreter::cmp, &DSPEmitter::cmp, 1, 0, {}, true, false, false, false, true}, // FLAGS($ac0 - $ac1) + {"MULAXH", 0x8300, 0xff00, DSP::Interpreter::mulaxh, &DSPEmitter::mulaxh, 1, 0, {}, true, false, false, false, true}, // $prod = $ax0.h * $ax0.h + {"CLRP", 0x8400, 0xff00, DSP::Interpreter::clrp, &DSPEmitter::clrp, 1, 0, {}, true, false, false, false, true}, // $prod = 0 + {"TSTPROD", 0x8500, 0xff00, DSP::Interpreter::tstprod, &DSPEmitter::tstprod,1, 0, {}, true, false, false, false, true}, // FLAGS($prod) + {"TSTAXH", 0x8600, 0xfe00, DSP::Interpreter::tstaxh, &DSPEmitter::tstaxh, 1, 1, {{P_REG1A, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // FLAGS($axR.h) + {"M2", 0x8a00, 0xff00, DSP::Interpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // enable "$prod *= 2" after every multiplication + {"M0", 0x8b00, 0xff00, DSP::Interpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // disable "$prod *= 2" after every multiplication + {"CLR15", 0x8c00, 0xff00, DSP::Interpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set normal multiplication + {"SET15", 0x8d00, 0xff00, DSP::Interpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set unsigned multiplication in MUL + {"SET16", 0x8e00, 0xff00, DSP::Interpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set 16 bit sign extension width + {"SET40", 0x8f00, 0xff00, DSP::Interpreter::srbith, &DSPEmitter::srbith, 1, 0, {}, true, false, false, false, false}, // set 40 bit sign extension width //9 - {"MUL", 0x9000, 0xf700, DSPInterpreter::mul, &DSPEmitter::mul, 1, 2, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $prod = $axS.l * $axS.h - {"ASR16", 0x9100, 0xf700, DSPInterpreter::asr16, &DSPEmitter::asr16, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acD >>= 16 (shifting in sign bits) - {"MULMVZ", 0x9200, 0xf600, DSPInterpreter::mulmvz, &DSPEmitter::mulmvz, 1, 3, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR.hm = $prod.hm; $acR.l = 0; $prod = $axS.l * $axS.h - {"MULAC", 0x9400, 0xf600, DSPInterpreter::mulac, &DSPEmitter::mulac, 1, 3, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR += $prod; $prod = $axS.l * $axS.h - {"MULMV", 0x9600, 0xf600, DSPInterpreter::mulmv, &DSPEmitter::mulmv, 1, 3, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR = $prod; $prod = $axS.l * $axS.h + {"MUL", 0x9000, 0xf700, DSP::Interpreter::mul, &DSPEmitter::mul, 1, 2, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $prod = $axS.l * $axS.h + {"ASR16", 0x9100, 0xf700, DSP::Interpreter::asr16, &DSPEmitter::asr16, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acD >>= 16 (shifting in sign bits) + {"MULMVZ", 0x9200, 0xf600, DSP::Interpreter::mulmvz, &DSPEmitter::mulmvz, 1, 3, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR.hm = $prod.hm; $acR.l = 0; $prod = $axS.l * $axS.h + {"MULAC", 0x9400, 0xf600, DSP::Interpreter::mulac, &DSPEmitter::mulac, 1, 3, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR += $prod; $prod = $axS.l * $axS.h + {"MULMV", 0x9600, 0xf600, DSP::Interpreter::mulmv, &DSPEmitter::mulmv, 1, 3, {{P_REG18, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR = $prod; $prod = $axS.l * $axS.h //a-b - {"MULX", 0xa000, 0xe700, DSPInterpreter::mulx, &DSPEmitter::mulx, 1, 2, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}}, true, false, false, false, true}, // $prod = $ax0.S * $ax1.T - {"ABS", 0xa100, 0xf700, DSPInterpreter::abs, &DSPEmitter::abs, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acD = abs($acD) - {"MULXMVZ", 0xa200, 0xe600, DSPInterpreter::mulxmvz, &DSPEmitter::mulxmvz,1, 3, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR.hm = $prod.hm; $acR.l = 0; $prod = $ax0.S * $ax1.T - {"MULXAC", 0xa400, 0xe600, DSPInterpreter::mulxac, &DSPEmitter::mulxac, 1, 3, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR += $prod; $prod = $ax0.S * $ax1.T - {"MULXMV", 0xa600, 0xe600, DSPInterpreter::mulxmv, &DSPEmitter::mulxmv, 1, 3, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR = $prod; $prod = $ax0.S * $ax1.T - {"TST", 0xb100, 0xf700, DSPInterpreter::tst, &DSPEmitter::tst, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // FLAGS($acR) + {"MULX", 0xa000, 0xe700, DSP::Interpreter::mulx, &DSPEmitter::mulx, 1, 2, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}}, true, false, false, false, true}, // $prod = $ax0.S * $ax1.T + {"ABS", 0xa100, 0xf700, DSP::Interpreter::abs, &DSPEmitter::abs, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acD = abs($acD) + {"MULXMVZ", 0xa200, 0xe600, DSP::Interpreter::mulxmvz, &DSPEmitter::mulxmvz,1, 3, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR.hm = $prod.hm; $acR.l = 0; $prod = $ax0.S * $ax1.T + {"MULXAC", 0xa400, 0xe600, DSP::Interpreter::mulxac, &DSPEmitter::mulxac, 1, 3, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR += $prod; $prod = $ax0.S * $ax1.T + {"MULXMV", 0xa600, 0xe600, DSP::Interpreter::mulxmv, &DSPEmitter::mulxmv, 1, 3, {{P_REGM18, 1, 0, 11, 0x1000}, {P_REGM19, 1, 0, 10, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR = $prod; $prod = $ax0.S * $ax1.T + {"TST", 0xb100, 0xf700, DSP::Interpreter::tst, &DSPEmitter::tst, 1, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // FLAGS($acR) //c-d - {"MULC", 0xc000, 0xe700, DSPInterpreter::mulc, &DSPEmitter::mulc, 1, 2, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $prod = $acS.m * $axS.h - {"CMPAR", 0xc100, 0xe700, DSPInterpreter::cmpar, &DSPEmitter::cmpar, 1, 2, {{P_ACC, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 12, 0x1000}}, true, false, false, false, true}, // FLAGS($acS - axR.h) - {"MULCMVZ", 0xc200, 0xe600, DSPInterpreter::mulcmvz, &DSPEmitter::mulcmvz,1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR.hm, $acR.l, $prod = $prod.hm, 0, $acS.m * $axS.h - {"MULCAC", 0xc400, 0xe600, DSPInterpreter::mulcac, &DSPEmitter::mulcac, 1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR, $prod = $acR + $prod, $acS.m * $axS.h - {"MULCMV", 0xc600, 0xe600, DSPInterpreter::mulcmv, &DSPEmitter::mulcmv, 1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR, $prod = $prod, $acS.m * $axS.h + {"MULC", 0xc000, 0xe700, DSP::Interpreter::mulc, &DSPEmitter::mulc, 1, 2, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $prod = $acS.m * $axS.h + {"CMPAR", 0xc100, 0xe700, DSP::Interpreter::cmpar, &DSPEmitter::cmpar, 1, 2, {{P_ACC, 1, 0, 11, 0x0800}, {P_REG1A, 1, 0, 12, 0x1000}}, true, false, false, false, true}, // FLAGS($acS - axR.h) + {"MULCMVZ", 0xc200, 0xe600, DSP::Interpreter::mulcmvz, &DSPEmitter::mulcmvz,1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR.hm, $acR.l, $prod = $prod.hm, 0, $acS.m * $axS.h + {"MULCAC", 0xc400, 0xe600, DSP::Interpreter::mulcac, &DSPEmitter::mulcac, 1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR, $prod = $acR + $prod, $acS.m * $axS.h + {"MULCMV", 0xc600, 0xe600, DSP::Interpreter::mulcmv, &DSPEmitter::mulcmv, 1, 3, {{P_ACCM, 1, 0, 12, 0x1000}, {P_REG1A, 1, 0, 11, 0x0800}, {P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR, $prod = $prod, $acS.m * $axS.h //e - {"MADDX", 0xe000, 0xfc00, DSPInterpreter::maddx, &DSPEmitter::maddx, 1, 2, {{P_REGM18, 1, 0, 8, 0x0200}, {P_REGM19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod += $ax0.S * $ax1.T - {"MSUBX", 0xe400, 0xfc00, DSPInterpreter::msubx, &DSPEmitter::msubx, 1, 2, {{P_REGM18, 1, 0, 8, 0x0200}, {P_REGM19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod -= $ax0.S * $ax1.T - {"MADDC", 0xe800, 0xfc00, DSPInterpreter::maddc, &DSPEmitter::maddc, 1, 2, {{P_ACCM, 1, 0, 9, 0x0200}, {P_REG19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod += $acS.m * $axT.h - {"MSUBC", 0xec00, 0xfc00, DSPInterpreter::msubc, &DSPEmitter::msubc, 1, 2, {{P_ACCM, 1, 0, 9, 0x0200}, {P_REG19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod -= $acS.m * $axT.h + {"MADDX", 0xe000, 0xfc00, DSP::Interpreter::maddx, &DSPEmitter::maddx, 1, 2, {{P_REGM18, 1, 0, 8, 0x0200}, {P_REGM19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod += $ax0.S * $ax1.T + {"MSUBX", 0xe400, 0xfc00, DSP::Interpreter::msubx, &DSPEmitter::msubx, 1, 2, {{P_REGM18, 1, 0, 8, 0x0200}, {P_REGM19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod -= $ax0.S * $ax1.T + {"MADDC", 0xe800, 0xfc00, DSP::Interpreter::maddc, &DSPEmitter::maddc, 1, 2, {{P_ACCM, 1, 0, 9, 0x0200}, {P_REG19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod += $acS.m * $axT.h + {"MSUBC", 0xec00, 0xfc00, DSP::Interpreter::msubc, &DSPEmitter::msubc, 1, 2, {{P_ACCM, 1, 0, 9, 0x0200}, {P_REG19, 1, 0, 7, 0x0100}}, true, false, false, false, true}, // $prod -= $acS.m * $axT.h //f - {"LSL16", 0xf000, 0xfe00, DSPInterpreter::lsl16, &DSPEmitter::lsl16, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR <<= 16 - {"MADD", 0xf200, 0xfe00, DSPInterpreter::madd, &DSPEmitter::madd, 1, 2, {{P_REG18, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $prod += $axS.l * $axS.h - {"LSR16", 0xf400, 0xfe00, DSPInterpreter::lsr16, &DSPEmitter::lsr16, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR >>= 16 - {"MSUB", 0xf600, 0xfe00, DSPInterpreter::msub, &DSPEmitter::msub, 1, 2, {{P_REG18, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $prod -= $axS.l * $axS.h - {"ADDPAXZ", 0xf800, 0xfc00, DSPInterpreter::addpaxz, &DSPEmitter::addpaxz,1, 2, {{P_ACC, 1, 0, 9, 0x0200}, {P_AX, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.hm = $prod.hm + $ax.h; $acD.l = 0 - {"CLRL", 0xfc00, 0xfe00, DSPInterpreter::clrl, &DSPEmitter::clrl, 1, 1, {{P_ACCL, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acR.l = 0 - {"MOVPZ", 0xfe00, 0xfe00, DSPInterpreter::movpz, &DSPEmitter::movpz, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.hm = $prod.hm; $acD.l = 0 + {"LSL16", 0xf000, 0xfe00, DSP::Interpreter::lsl16, &DSPEmitter::lsl16, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR <<= 16 + {"MADD", 0xf200, 0xfe00, DSP::Interpreter::madd, &DSPEmitter::madd, 1, 2, {{P_REG18, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $prod += $axS.l * $axS.h + {"LSR16", 0xf400, 0xfe00, DSP::Interpreter::lsr16, &DSPEmitter::lsr16, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acR >>= 16 + {"MSUB", 0xf600, 0xfe00, DSP::Interpreter::msub, &DSPEmitter::msub, 1, 2, {{P_REG18, 1, 0, 8, 0x0100}, {P_REG1A, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $prod -= $axS.l * $axS.h + {"ADDPAXZ", 0xf800, 0xfc00, DSP::Interpreter::addpaxz, &DSPEmitter::addpaxz,1, 2, {{P_ACC, 1, 0, 9, 0x0200}, {P_AX, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.hm = $prod.hm + $ax.h; $acD.l = 0 + {"CLRL", 0xfc00, 0xfe00, DSP::Interpreter::clrl, &DSPEmitter::clrl, 1, 1, {{P_ACCL, 1, 0, 11, 0x0800}}, true, false, false, false, true}, // $acR.l = 0 + {"MOVPZ", 0xfe00, 0xfe00, DSP::Interpreter::movpz, &DSPEmitter::movpz, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true}, // $acD.hm = $prod.hm; $acD.l = 0 }; const DSPOPCTemplate cw = - {"CW", 0x0000, 0x0000, DSPInterpreter::nop, nullptr, 1, 1, {{P_VAL, 2, 0, 0, 0xffff}}, false, false, false, false, false}; + {"CW", 0x0000, 0x0000, DSP::Interpreter::nop, nullptr, 1, 1, {{P_VAL, 2, 0, 0, 0xffff}}, false, false, false, false, false}; // extended opcodes const DSPOPCTemplate opcodes_ext[] = { - {"XXX", 0x0000, 0x00fc, DSPInterpreter::Ext::nop, &DSPEmitter::nop, 1, 1, {{P_VAL, 1, 0, 0, 0x00ff}}, false, false, false, false, false}, // no operation + {"XXX", 0x0000, 0x00fc, DSP::Interpreter::Ext::nop, &DSPEmitter::nop, 1, 1, {{P_VAL, 1, 0, 0, 0x00ff}}, false, false, false, false, false}, // no operation - {"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arR-- - {"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arR++ - {"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, &DSPEmitter::nr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arR += $ixR - {"MV", 0x0010, 0x00f0, DSPInterpreter::Ext::mv, &DSPEmitter::mv, 1, 2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $(D+24) = $(S+28) + {"DR", 0x0004, 0x00fc, DSP::Interpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arR-- + {"IR", 0x0008, 0x00fc, DSP::Interpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arR++ + {"NR", 0x000c, 0x00fc, DSP::Interpreter::Ext::nr, &DSPEmitter::nr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $arR += $ixR + {"MV", 0x0010, 0x00f0, DSP::Interpreter::Ext::mv, &DSPEmitter::mv, 1, 2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $(D+24) = $(S+28) - {"S", 0x0020, 0x00e4, DSPInterpreter::Ext::s, &DSPEmitter::s, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false, false, false, false}, // MEM[$D++] = $(S+28) - {"SN", 0x0024, 0x00e4, DSPInterpreter::Ext::sn, &DSPEmitter::sn, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false, false, false, false}, // MEM[$D] = $(D+28); $D += $(D+4) + {"S", 0x0020, 0x00e4, DSP::Interpreter::Ext::s, &DSPEmitter::s, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false, false, false, false}, // MEM[$D++] = $(S+28) + {"SN", 0x0024, 0x00e4, DSP::Interpreter::Ext::sn, &DSPEmitter::sn, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false, false, false, false}, // MEM[$D] = $(D+28); $D += $(D+4) - {"L", 0x0040, 0x00c4, DSPInterpreter::Ext::l, &DSPEmitter::l, 1, 2, {{P_REG18, 1, 0, 3, 0x0038}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $(D+24) = MEM[$S++] - {"LN", 0x0044, 0x00c4, DSPInterpreter::Ext::ln, &DSPEmitter::ln, 1, 2, {{P_REG18, 1, 0, 3, 0x0038}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $(D+24) = MEM[$S]; $S += $(S+4) + {"L", 0x0040, 0x00c4, DSP::Interpreter::Ext::l, &DSPEmitter::l, 1, 2, {{P_REG18, 1, 0, 3, 0x0038}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $(D+24) = MEM[$S++] + {"LN", 0x0044, 0x00c4, DSP::Interpreter::Ext::ln, &DSPEmitter::ln, 1, 2, {{P_REG18, 1, 0, 3, 0x0038}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $(D+24) = MEM[$S]; $S += $(S+4) - {"LS", 0x0080, 0x00ce, DSPInterpreter::Ext::ls, &DSPEmitter::ls, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0++]; MEM[$ar3++] = $acS.m - {"SL", 0x0082, 0x00ce, DSPInterpreter::Ext::sl, &DSPEmitter::sl, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0++] = $acS.m; $(D+24) = MEM[$ar3++] - {"LSN", 0x0084, 0x00ce, DSPInterpreter::Ext::lsn, &DSPEmitter::lsn, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0]; MEM[$ar3++] = $acS.m; $ar0 += $ix0 - {"SLN", 0x0086, 0x00ce, DSPInterpreter::Ext::sln, &DSPEmitter::sln, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0] = $acS.m; $(D+24) = MEM[$ar3++]; $ar0 += $ix0 - {"LSM", 0x0088, 0x00ce, DSPInterpreter::Ext::lsm, &DSPEmitter::lsm, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0++]; MEM[$ar3] = $acS.m; $ar3 += $ix3 - {"SLM", 0x008a, 0x00ce, DSPInterpreter::Ext::slm, &DSPEmitter::slm, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0++] = $acS.m; $(D+24) = MEM[$ar3]; $ar3 += $ix3 - {"LSNM", 0x008c, 0x00ce, DSPInterpreter::Ext::lsnm, &DSPEmitter::lsnm, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0]; MEM[$ar3] = $acS.m; $ar0 += $ix0; $ar3 += $ix3 - {"SLNM", 0x008e, 0x00ce, DSPInterpreter::Ext::slnm, &DSPEmitter::slnm, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0] = $acS.m; $(D+24) = MEM[$ar3]; $ar0 += $ix0; $ar3 += $ix3 + {"LS", 0x0080, 0x00ce, DSP::Interpreter::Ext::ls, &DSPEmitter::ls, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0++]; MEM[$ar3++] = $acS.m + {"SL", 0x0082, 0x00ce, DSP::Interpreter::Ext::sl, &DSPEmitter::sl, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0++] = $acS.m; $(D+24) = MEM[$ar3++] + {"LSN", 0x0084, 0x00ce, DSP::Interpreter::Ext::lsn, &DSPEmitter::lsn, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0]; MEM[$ar3++] = $acS.m; $ar0 += $ix0 + {"SLN", 0x0086, 0x00ce, DSP::Interpreter::Ext::sln, &DSPEmitter::sln, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0] = $acS.m; $(D+24) = MEM[$ar3++]; $ar0 += $ix0 + {"LSM", 0x0088, 0x00ce, DSP::Interpreter::Ext::lsm, &DSPEmitter::lsm, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0++]; MEM[$ar3] = $acS.m; $ar3 += $ix3 + {"SLM", 0x008a, 0x00ce, DSP::Interpreter::Ext::slm, &DSPEmitter::slm, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0++] = $acS.m; $(D+24) = MEM[$ar3]; $ar3 += $ix3 + {"LSNM", 0x008c, 0x00ce, DSP::Interpreter::Ext::lsnm, &DSPEmitter::lsnm, 1, 2, {{P_REG18, 1, 0, 4, 0x0030}, {P_ACCM, 1, 0, 0, 0x0001}}, false, false, false, false, false}, // $(D+24) = MEM[$ar0]; MEM[$ar3] = $acS.m; $ar0 += $ix0; $ar3 += $ix3 + {"SLNM", 0x008e, 0x00ce, DSP::Interpreter::Ext::slnm, &DSPEmitter::slnm, 1, 2, {{P_ACCM, 1, 0, 0, 0x0001}, {P_REG18, 1, 0, 4, 0x0030}}, false, false, false, false, false}, // MEM[$ar0] = $acS.m; $(D+24) = MEM[$ar3]; $ar0 += $ix0; $ar3 += $ix3 - {"LDAX", 0x00c3, 0x00cf, DSPInterpreter::Ext::ldax, &DSPEmitter::ldax, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS++]; $axR.l = MEM[$ar3++] - {"LDAXN", 0x00c7, 0x00cf, DSPInterpreter::Ext::ldaxn, &DSPEmitter::ldaxn, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS]; $axR.l = MEM[$ar3++]; $arS += $ixS - {"LDAXM", 0x00cb, 0x00cf, DSPInterpreter::Ext::ldaxm, &DSPEmitter::ldaxm, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS++]; $axR.l = MEM[$ar3]; $ar3 += $ix3 - {"LDAXNM", 0x00cf, 0x00cf, DSPInterpreter::Ext::ldaxnm, &DSPEmitter::ldaxnm, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS]; $axR.l = MEM[$ar3]; $arS += $ixS; $ar3 += $ix3 + {"LDAX", 0x00c3, 0x00cf, DSP::Interpreter::Ext::ldax, &DSPEmitter::ldax, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS++]; $axR.l = MEM[$ar3++] + {"LDAXN", 0x00c7, 0x00cf, DSP::Interpreter::Ext::ldaxn, &DSPEmitter::ldaxn, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS]; $axR.l = MEM[$ar3++]; $arS += $ixS + {"LDAXM", 0x00cb, 0x00cf, DSP::Interpreter::Ext::ldaxm, &DSPEmitter::ldaxm, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS++]; $axR.l = MEM[$ar3]; $ar3 += $ix3 + {"LDAXNM", 0x00cf, 0x00cf, DSP::Interpreter::Ext::ldaxnm, &DSPEmitter::ldaxnm, 1, 2, {{P_AX, 1, 0, 4, 0x0010}, {P_PRG, 1, 0, 5, 0x0020}}, false, false, false, false, false}, // $axR.h = MEM[$arS]; $axR.l = MEM[$ar3]; $arS += $ixS; $ar3 += $ix3 - {"LD", 0x00c0, 0x00cc, DSPInterpreter::Ext::ld, &DSPEmitter::ld, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS++]; $ax1.R = MEM[$ar3++] - {"LDN", 0x00c4, 0x00cc, DSPInterpreter::Ext::ldn, &DSPEmitter::ldn, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS]; $ax1.R = MEM[$ar3++]; $arS += $ixS - {"LDM", 0x00c8, 0x00cc, DSPInterpreter::Ext::ldm, &DSPEmitter::ldm, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS++]; $ax1.R = MEM[$ar3]; $ar3 += $ix3 - {"LDNM", 0x00cc, 0x00cc, DSPInterpreter::Ext::ldnm, &DSPEmitter::ldnm, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS]; $ax1.R = MEM[$ar3]; $arS += $ixS; $ar3 += $ix3 + {"LD", 0x00c0, 0x00cc, DSP::Interpreter::Ext::ld, &DSPEmitter::ld, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS++]; $ax1.R = MEM[$ar3++] + {"LDN", 0x00c4, 0x00cc, DSP::Interpreter::Ext::ldn, &DSPEmitter::ldn, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS]; $ax1.R = MEM[$ar3++]; $arS += $ixS + {"LDM", 0x00c8, 0x00cc, DSP::Interpreter::Ext::ldm, &DSPEmitter::ldm, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS++]; $ax1.R = MEM[$ar3]; $ar3 += $ix3 + {"LDNM", 0x00cc, 0x00cc, DSP::Interpreter::Ext::ldnm, &DSPEmitter::ldnm, 1, 3, {{P_REGM18, 1, 0, 4, 0x0020}, {P_REGM19, 1, 0, 3, 0x0010}, {P_PRG, 1, 0, 0, 0x0003}}, false, false, false, false, false}, // $ax0.D = MEM[$arS]; $ax1.R = MEM[$ar3]; $arS += $ixS; $ar3 += $ix3 }; const int opcodes_size = sizeof(opcodes) / sizeof(DSPOPCTemplate); diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntArithmetic.cpp b/Source/Core/Core/DSP/Interpreter/DSPIntArithmetic.cpp index b4b4c39cd2..79b56feaed 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntArithmetic.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPIntArithmetic.cpp @@ -12,7 +12,9 @@ // Arithmetic and accumulator control. -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { // CLR $acR // 1000 r001 xxxx xxxx @@ -1158,4 +1160,5 @@ void asrnr(const UDSPInstruction opc) Update_SR_Register64(dsp_get_long_acc(dreg)); } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntBranch.cpp b/Source/Core/Core/DSP/Interpreter/DSPIntBranch.cpp index 0b81b19825..be72c80889 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntBranch.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPIntBranch.cpp @@ -11,7 +11,9 @@ #include "Core/DSP/Interpreter/DSPIntUtil.h" #include "Core/DSP/Interpreter/DSPInterpreter.h" -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { // Generic call implementation // CALLcc addressA @@ -262,4 +264,5 @@ void bloopi(const UDSPInstruction opc) } } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.cpp b/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.cpp index d79a01638a..13c6892530 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.cpp @@ -9,7 +9,9 @@ #include "Core/DSP/Interpreter/DSPIntCCUtil.h" #include "Core/DSP/DSPCore.h" -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { void Update_SR_Register64(s64 _Value, bool carry, bool overflow) { @@ -181,4 +183,5 @@ bool CheckCondition(u8 _Condition) } } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.h b/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.h index c0098afa98..c50c2f15f0 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.h +++ b/Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.h @@ -10,7 +10,9 @@ #include "Common/CommonTypes.h" -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { bool CheckCondition(u8 _Condition); @@ -39,4 +41,5 @@ inline bool isOverS32(s64 acc) return (acc != (s32)acc) ? true : false; } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.cpp b/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.cpp index 7b5cc46960..edcd673a28 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.cpp @@ -29,7 +29,9 @@ inline static void writeToBackLog(int i, int idx, u16 value) writeBackLogIdx[i] = idx; } -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { namespace Ext { @@ -496,8 +498,9 @@ void nop(const UDSPInstruction opc) { } -} // end namespace ext -} // end namespace DSPInterpeter +} // namespace Ext +} // namespace Interpeter +} // namespace DSP // The ext ops are calculated in parallel with the actual op. That means that // both the main op and the ext op see the same register state as input. The @@ -513,11 +516,12 @@ void applyWriteBackLog() // infinitive loops for (int i = 0; writeBackLogIdx[i] != -1; i++) { + u16 value = writeBackLog[i]; #ifdef PRECISE_BACKLOG - dsp_op_write_reg(writeBackLogIdx[i], dsp_op_read_reg(writeBackLogIdx[i]) | writeBackLog[i]); -#else - dsp_op_write_reg(writeBackLogIdx[i], writeBackLog[i]); + value |= DSP::Interpreter::dsp_op_read_reg(writeBackLogIdx[i]); #endif + DSP::Interpreter::dsp_op_write_reg(writeBackLogIdx[i], value); + // Clear back log writeBackLogIdx[i] = -1; } @@ -537,7 +541,7 @@ void zeroWriteBackLog() // infinitive loops for (int i = 0; writeBackLogIdx[i] != -1; i++) { - dsp_op_write_reg(writeBackLogIdx[i], 0); + DSP::Interpreter::dsp_op_write_reg(writeBackLogIdx[i], 0); } #endif } @@ -559,7 +563,7 @@ void zeroWriteBackLogPreserveAcc(u8 acc) (writeBackLogIdx[i] == DSP_REG_ACH1))) continue; - dsp_op_write_reg(writeBackLogIdx[i], 0); + DSP::Interpreter::dsp_op_write_reg(writeBackLogIdx[i], 0); } #endif } diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.h b/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.h index b492590e2f..5527824aad 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.h +++ b/Source/Core/Core/DSP/Interpreter/DSPIntExtOps.h @@ -11,7 +11,9 @@ // Many opcode have the lower 0xFF (some only 0x7f) free - there, an opcode extension // can be stored. -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { namespace Ext { @@ -41,5 +43,6 @@ void ir(const UDSPInstruction opc); void nr(const UDSPInstruction opc); void nop(const UDSPInstruction opc); -} // end namespace Ext -} // end namespace DSPinterpeter +} // namespace Ext +} // namespace Interpeter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntLoadStore.cpp b/Source/Core/Core/DSP/Interpreter/DSPIntLoadStore.cpp index 018a0bef57..0da51d9275 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntLoadStore.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPIntLoadStore.cpp @@ -8,7 +8,9 @@ #include "Core/DSP/Interpreter/DSPIntUtil.h" #include "Core/DSP/Interpreter/DSPInterpreter.h" -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { // SRS @M, $(0x18+S) // 0010 1sss mmmm mmmm @@ -260,4 +262,5 @@ void ilrrn(const UDSPInstruction opc) g_dsp.r.ar[reg] = dsp_increase_addr_reg(reg, (s16)g_dsp.r.ix[reg]); } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntMisc.cpp b/Source/Core/Core/DSP/Interpreter/DSPIntMisc.cpp index 23f4ca98f3..52a026d5a7 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntMisc.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPIntMisc.cpp @@ -10,7 +10,9 @@ #include "Core/DSP/Interpreter/DSPIntUtil.h" #include "Core/DSP/Interpreter/DSPInterpreter.h" -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { // MRR $D, $S // 0001 11dd ddds ssss @@ -158,4 +160,5 @@ void srbith(const UDSPInstruction opc) } } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntMultiplier.cpp b/Source/Core/Core/DSP/Interpreter/DSPIntMultiplier.cpp index a3c149d7e7..dba286a839 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntMultiplier.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPIntMultiplier.cpp @@ -11,7 +11,9 @@ #include "Core/DSP/Interpreter/DSPIntUtil.h" #include "Core/DSP/Interpreter/DSPInterpreter.h" -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { // Only MULX family instructions have unsigned/mixed support. inline s64 dsp_get_multiply_prod(u16 a, u16 b, u8 sign) @@ -592,4 +594,5 @@ void msub(const UDSPInstruction opc) dsp_set_long_prod(prod); } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPIntUtil.h b/Source/Core/Core/DSP/Interpreter/DSPIntUtil.h index 31ec638b31..8b648ba326 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPIntUtil.h +++ b/Source/Core/Core/DSP/Interpreter/DSPIntUtil.h @@ -11,6 +11,10 @@ #include "Core/DSP/DSPCore.h" #include "Core/DSP/DSPStacks.h" +namespace DSP +{ +namespace Interpreter +{ // --------------------------------------------------------------------------------------- // --- SR // --------------------------------------------------------------------------------------- @@ -375,3 +379,6 @@ inline s16 dsp_get_ax_h(int _reg) { return (s16)g_dsp.r.ax[_reg].h; } + +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPInterpreter.cpp b/Source/Core/Core/DSP/Interpreter/DSPInterpreter.cpp index 72c650171d..8f2acff3f6 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPInterpreter.cpp +++ b/Source/Core/Core/DSP/Interpreter/DSPInterpreter.cpp @@ -13,7 +13,9 @@ #include "Core/DSP/DSPMemoryMap.h" #include "Core/DSP/DSPTables.h" -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { namespace { @@ -238,4 +240,5 @@ void nop(const UDSPInstruction opc) ERROR_LOG(DSPLLE, "LLE: Unrecognized opcode 0x%04x", opc); } -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/DSP/Interpreter/DSPInterpreter.h b/Source/Core/Core/DSP/Interpreter/DSPInterpreter.h index 25153a449c..54b674bab4 100644 --- a/Source/Core/Core/DSP/Interpreter/DSPInterpreter.h +++ b/Source/Core/Core/DSP/Interpreter/DSPInterpreter.h @@ -8,7 +8,9 @@ #define DSP_REG_MASK 0x1f -namespace DSPInterpreter +namespace DSP +{ +namespace Interpreter { void Step(); @@ -146,4 +148,5 @@ void xorc(const UDSPInstruction opc); void xori(const UDSPInstruction opc); void xorr(const UDSPInstruction opc); -} // namespace +} // namespace Interpreter +} // namespace DSP diff --git a/Source/Core/Core/HW/DSPLLE/DSPLLE.cpp b/Source/Core/Core/HW/DSPLLE/DSPLLE.cpp index 8af0c9b7ec..2901235acb 100644 --- a/Source/Core/Core/HW/DSPLLE/DSPLLE.cpp +++ b/Source/Core/Core/HW/DSPLLE/DSPLLE.cpp @@ -91,7 +91,7 @@ void DSPLLE::DSPThread(DSPLLE* dsp_lle) } else { - DSPInterpreter::RunCyclesThread(cycles); + DSP::Interpreter::RunCyclesThread(cycles); } dsp_lle->m_cycle_count.store(0); } @@ -203,7 +203,7 @@ void DSPLLE::Shutdown() u16 DSPLLE::DSP_WriteControlRegister(u16 _uFlag) { - DSPInterpreter::WriteCR(_uFlag); + DSP::Interpreter::WriteCR(_uFlag); if (_uFlag & 2) { @@ -222,12 +222,12 @@ u16 DSPLLE::DSP_WriteControlRegister(u16 _uFlag) } } - return DSPInterpreter::ReadCR(); + return DSP::Interpreter::ReadCR(); } u16 DSPLLE::DSP_ReadControlRegister() { - return DSPInterpreter::ReadCR(); + return DSP::Interpreter::ReadCR(); } u16 DSPLLE::DSP_ReadMailBoxHigh(bool _CPUMailbox)