more docs few small fixes
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2920 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -44,6 +44,12 @@ void tsta(int reg)
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}
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// Generic call implementation
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// CALLcc addressA
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// 0000 0010 1011 cccc
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// aaaa aaaa aaaa aaaa
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// Call function if condition cc has been met. Push program counter of
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// instruction following "call" to $st0. Set program counter to address
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// represented by value that follows this "call" instruction.
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void call(const UDSPInstruction& opc)
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{
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u16 dest = dsp_fetch_code();
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@ -56,6 +62,11 @@ void call(const UDSPInstruction& opc)
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}
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// Generic callr implementation
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// CALLRcc $R
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// 0001 0111 rrr1 cccc
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// Call functionif condition cc has been met.Push program counter of
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// instruction following "call" tocall stack $st0. Set program counter to
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// register $R.
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void callr(const UDSPInstruction& opc)
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{
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u16 addr;
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@ -71,6 +82,9 @@ void callr(const UDSPInstruction& opc)
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}
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// Generic if implementation
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// IFcc
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// 0000 0010 0111 cccc
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// Execute following opcode if the condition has been met.
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void ifcc(const UDSPInstruction& opc)
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{
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if (!CheckCondition(opc.hex & 0xf))
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@ -81,6 +95,11 @@ void ifcc(const UDSPInstruction& opc)
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}
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// Generic jmp implementation
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// Jcc addressA
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// 0000 0010 1001 cccc
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// aaaa aaaa aaaa aaaa
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// Jump to addressA if condition cc has been met. Set program counter to
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// address represented by value that follows this "jmp" instruction.
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void jcc(const UDSPInstruction& opc)
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{
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u16 dest = dsp_fetch_code();
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@ -92,6 +111,9 @@ void jcc(const UDSPInstruction& opc)
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}
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// Generic jmpr implementation
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// JMPcc $R
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// 0001 0111 rrr0 cccc
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// Jump to address; set program counter to a value from register $R.
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void jmprcc(const UDSPInstruction& opc)
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{
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u8 reg;
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@ -100,10 +122,14 @@ void jmprcc(const UDSPInstruction& opc)
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{
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reg = (opc.hex >> 5) & 0x7;
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g_dsp.pc = dsp_op_read_reg(reg);
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}
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}
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}
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// Generic ret implementation
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// RETcc
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// 0000 0010 1101 cccc
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// Return from subroutine if condition cc has been met. Pops stored PC
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// from call stack $st0 and sets $pc to this location.
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void ret(const UDSPInstruction& opc)
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{
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if (CheckCondition(opc.hex & 0xf))
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@ -629,10 +655,9 @@ void mulcac(const UDSPInstruction& opc)
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void movr(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex >> 8) & 0x1;
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u8 rreg = ((opc.hex >> 9) & 0x1);
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u8 sreg = ((opc.hex >> 10) & 0x1) + DSP_REG_AXL0;
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u8 sreg = ((opc.hex >> 9) & 0x3) + DSP_REG_AXL0;
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s64 acc = (s16)g_dsp.r[sreg + rreg];
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s64 acc = (s16)g_dsp.r[sreg];
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acc <<= 16;
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acc &= ~0xffff;
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@ -975,7 +1000,7 @@ void movnp(const UDSPInstruction& opc)
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void mov(const UDSPInstruction& opc)
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{
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u8 D = (opc.hex >> 8) & 0x1;
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u16 acc = dsp_get_long_acc(1 - D);
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u64 acc = dsp_get_long_acc(1 - D);
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dsp_set_long_acc(D, acc);
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Update_SR_Register64(acc);
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@ -1152,7 +1177,7 @@ void asr16(const UDSPInstruction& opc)
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void lsl(const UDSPInstruction& opc)
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{
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u16 shift = opc.ushift;
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u64 acc = dsp_get_long_acc(opc.areg);
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s64 acc = dsp_get_long_acc(opc.areg);
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acc <<= shift;
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dsp_set_long_acc(opc.areg, acc);
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@ -1166,8 +1191,8 @@ void lsl(const UDSPInstruction& opc)
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// calculated by negating sign extended bits 0-6.
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void lsr(const UDSPInstruction& opc)
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{
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u16 shift = -opc.ushift;
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u64 acc = dsp_get_long_acc(opc.areg);
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s16 shift = -opc.ushift;
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s64 acc = dsp_get_long_acc(opc.areg);
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// Lop off the extraneous sign extension our 64-bit fake accum causes
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acc &= 0x000000FFFFFFFFFFULL;
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acc >>= shift;
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@ -1184,7 +1209,7 @@ void asl(const UDSPInstruction& opc)
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u16 shift = opc.ushift;
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// arithmetic shift
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u64 acc = dsp_get_long_acc(opc.areg);
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s64 acc = dsp_get_long_acc(opc.areg);
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acc <<= shift;
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dsp_set_long_acc(opc.areg, acc);
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@ -1196,10 +1221,9 @@ void asl(const UDSPInstruction& opc)
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// 0001 010r 11ii iiii
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// Arithmetically shifts right accumulator $acR by number specified by
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// value calculated by negating sign extended bits 0-6.
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void asr(const UDSPInstruction& opc)
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{
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u16 shift = -opc.ushift;
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s16 shift = -opc.ushift;
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// arithmetic shift
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s64 acc = dsp_get_long_acc(opc.areg);
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