From 427a26fcc2709e49417278e942f60f97ba329284 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Wed, 6 Mar 2013 13:46:36 -0600 Subject: [PATCH 1/4] Clean up PPCSTATE_OFF --- Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp | 12 ++--- Source/Core/Core/Src/PowerPC/JitArm32/Jit.h | 2 +- .../Core/Src/PowerPC/JitArm32/JitArmCache.cpp | 2 +- .../Src/PowerPC/JitArm32/JitArm_Branch.cpp | 46 +++++++++---------- .../Src/PowerPC/JitArm32/JitArm_Integer.cpp | 6 +-- .../Src/PowerPC/JitArm32/JitArm_LoadStore.cpp | 10 ++-- .../JitArm32/JitArm_LoadStoreFloating.cpp | 2 +- .../JitArm32/JitArm_SystemRegisters.cpp | 6 +-- .../Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp | 20 ++++---- .../Core/Src/PowerPC/JitArm32/JitFPRCache.cpp | 8 ++-- .../Core/Src/PowerPC/JitArm32/JitRegCache.cpp | 8 ++-- 11 files changed, 61 insertions(+), 61 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp index 3b2ee45111..8748ebac2d 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp @@ -100,7 +100,7 @@ void JitArm::HLEFunction(UGeckoInstruction _inst) MOVI2R(R1, _inst.hex); QuickCallFunction(R14, (void*)&HLE::Execute); ARMReg rA = gpr.GetReg(); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, npc)); + LDR(rA, R9, PPCSTATE_OFF(npc)); WriteExitDestInR(rA); } @@ -161,7 +161,7 @@ void JitArm::DoDownCount() } void JitArm::WriteExitDestInR(ARMReg Reg) { - STR(R9, Reg, PPCSTATE_OFF(PowerPC::ppcState, pc)); + STR(R9, Reg, PPCSTATE_OFF(pc)); Cleanup(); DoDownCount(); MOVI2R(Reg, (u32)asm_routines.dispatcher); @@ -170,7 +170,7 @@ void JitArm::WriteExitDestInR(ARMReg Reg) } void JitArm::WriteRfiExitDestInR(ARMReg Reg) { - STR(R9, Reg, PPCSTATE_OFF(PowerPC::ppcState, pc)); + STR(R9, Reg, PPCSTATE_OFF(pc)); Cleanup(); DoDownCount(); @@ -209,7 +209,7 @@ void JitArm::WriteExit(u32 destination, int exit_num) { ARMReg A = gpr.GetReg(false); MOVI2R(A, destination); - STR(R9, A, PPCSTATE_OFF(PowerPC::ppcState, pc)); + STR(R9, A, PPCSTATE_OFF(pc)); MOVI2R(A, (u32)asm_routines.dispatcher); B(A); } @@ -381,10 +381,10 @@ const u8* JitArm::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlo ARMReg C = gpr.GetReg(); Operand2 Shift(2, 10); // 1 << 13 MOVI2R(C, js.blockStart); // R3 - LDR(A, R9, PPCSTATE_OFF(PowerPC::ppcState, msr)); + LDR(A, R9, PPCSTATE_OFF(msr)); TST(A, Shift); FixupBranch b1 = B_CC(CC_NEQ); - STR(R9, C, PPCSTATE_OFF(PowerPC::ppcState, pc)); + STR(R9, C, PPCSTATE_OFF(pc)); MOVI2R(A, (u32)asm_routines.fpException); B(A); SetJumpTarget(b1); diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h index 1dde0fa55f..7067e3a3a4 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h +++ b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h @@ -47,7 +47,7 @@ if (Core::g_CoreStartupParameter.bJITOff || \ Core::g_CoreStartupParameter.bJIT##type##Off) \ {Default(inst); return;} -#define PPCSTATE_OFF(str, elem) ((s32)STRUCT_OFF(PowerPC::ppcState, elem) - (s32)STRUCT_OFF(PowerPC::ppcState, spr[0])) +#define PPCSTATE_OFF(elem) ((s32)STRUCT_OFF(PowerPC::ppcState, elem) - (s32)STRUCT_OFF(PowerPC::ppcState, spr[0])) class JitArm : public JitBase, public ArmGen::ARMXCodeBlock { private: diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArmCache.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArmCache.cpp index dd85699a6d..f95c2e58e6 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArmCache.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArmCache.cpp @@ -38,7 +38,7 @@ using namespace ArmGen; ARMXEmitter emit((u8 *)location); emit.MOVI2R(R11, address); emit.MOVI2R(R12, (u32)jit->GetAsmRoutines()->dispatcher); - emit.STR(R9, R11, PPCSTATE_OFF(PowerPC::ppcState, pc)); + emit.STR(R9, R11, PPCSTATE_OFF(pc)); emit.B(R12); } diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp index 1c401771d7..3aa972248d 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp @@ -50,9 +50,9 @@ void JitArm::sc(UGeckoInstruction inst) ARMABI_MOVI2M((u32)&PC, js.compilerPC + 4); // Destroys R12 and R14 ARMReg rA = gpr.GetReg(); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(rA, R9, PPCSTATE_OFF(Exceptions)); ORR(rA, rA, EXCEPTION_SYSCALL); - STR(R9, rA, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + STR(R9, rA, PPCSTATE_OFF(Exceptions)); gpr.Unlock(rA); WriteExceptionExit(); @@ -81,19 +81,19 @@ void JitArm::rfi(UGeckoInstruction inst) MOVI2R(rB, (~mask) & clearMSR13); MOVI2R(rC, mask & clearMSR13); - LDR(rD, R9, PPCSTATE_OFF(PowerPC::ppcState, msr)); + LDR(rD, R9, PPCSTATE_OFF(msr)); AND(rD, rD, rB); // rD = Masked MSR - STR(R9, rD, PPCSTATE_OFF(PowerPC::ppcState, msr)); + STR(R9, rD, PPCSTATE_OFF(msr)); - LDR(rB, R9, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_SRR1])); // rB contains SRR1 here + LDR(rB, R9, PPCSTATE_OFF(spr[SPR_SRR1])); // rB contains SRR1 here AND(rB, rB, rC); // rB contains masked SRR1 here ORR(rB, rD, rB); // rB = Masked MSR OR masked SRR1 - STR(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, msr)); // STR rB in to rA + STR(R9, rB, PPCSTATE_OFF(msr)); // STR rB in to rA - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_SRR0])); + LDR(rA, R9, PPCSTATE_OFF(spr[SPR_SRR0])); gpr.Unlock(rB, rC, rD); WriteRfiExitDestInR(rA); // rA gets unlocked here @@ -117,7 +117,7 @@ void JitArm::bx(UGeckoInstruction inst) ARMReg rA = gpr.GetReg(false); u32 Jumpto = js.compilerPC + 4; MOVI2R(rA, Jumpto); - STR(R9, rA, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_LR])); + STR(R9, rA, PPCSTATE_OFF(spr[SPR_LR])); //ARMABI_MOVI2M((u32)&LR, js.compilerPC + 4); } // If this is not the last instruction of a block, @@ -166,9 +166,9 @@ void JitArm::bcx(UGeckoInstruction inst) FixupBranch pCTRDontBranch; if ((inst.BO & BO_DONT_DECREMENT_FLAG) == 0) // Decrement and test CTR { - LDR(rB, R9, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_CTR])); + LDR(rB, R9, PPCSTATE_OFF(spr[SPR_CTR])); SUBS(rB, rB, 1); - STR(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_CTR])); + STR(R9, rB, PPCSTATE_OFF(spr[SPR_CTR])); //SUB(32, M(&CTR), Imm8(1)); if (inst.BO & BO_BRANCH_IF_CTR_0) @@ -180,7 +180,7 @@ void JitArm::bcx(UGeckoInstruction inst) FixupBranch pConditionDontBranch; if ((inst.BO & BO_DONT_CHECK_CONDITION) == 0) // Test a CR bit { - LDRB(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, cr_fast) + (inst.BI >> 2)); + LDRB(rA, R9, PPCSTATE_OFF(cr_fast) + (inst.BI >> 2)); TST(rA, 8 >> (inst.BI & 3)); //TEST(8, M(&PowerPC::ppcState.cr_fast[inst.BI >> 2]), Imm8(8 >> (inst.BI & 3))); @@ -193,7 +193,7 @@ void JitArm::bcx(UGeckoInstruction inst) { u32 Jumpto = js.compilerPC + 4; MOVI2R(rB, Jumpto); - STR(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_LR])); + STR(R9, rB, PPCSTATE_OFF(spr[SPR_LR])); //ARMABI_MOVI2M((u32)&LR, js.compilerPC + 4); // Careful, destroys R14, R12 } gpr.Unlock(rA, rB); @@ -235,11 +235,11 @@ void JitArm::bcctrx(UGeckoInstruction inst) { u32 Jumpto = js.compilerPC + 4; MOVI2R(rA, Jumpto); - STR(R9, rA, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_LR])); + STR(R9, rA, PPCSTATE_OFF(spr[SPR_LR])); // ARMABI_MOVI2M((u32)&LR, js.compilerPC + 4); } MVN(rB, 0x3); // 0xFFFFFFFC - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_CTR])); + LDR(rA, R9, PPCSTATE_OFF(spr[SPR_CTR])); AND(rA, rA, rB); gpr.Unlock(rB); WriteExitDestInR(rA); @@ -253,7 +253,7 @@ void JitArm::bcctrx(UGeckoInstruction inst) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); - LDRB(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, cr_fast) + (inst.BI >> 2)); + LDRB(rA, R9, PPCSTATE_OFF(cr_fast) + (inst.BI >> 2)); TST(rA, 8 >> (inst.BI & 3)); CCFlags branch; if (inst.BO_2 & BO_BRANCH_IF_TRUE) @@ -262,14 +262,14 @@ void JitArm::bcctrx(UGeckoInstruction inst) branch = CC_NEQ; FixupBranch b = B_CC(branch); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_CTR])); + LDR(rA, R9, PPCSTATE_OFF(spr[SPR_CTR])); MVN(rB, 0x3); // 0xFFFFFFFC AND(rA, rA, rB); if (inst.LK_3){ u32 Jumpto = js.compilerPC + 4; MOVI2R(rB, Jumpto); - STR(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_LR])); + STR(R9, rB, PPCSTATE_OFF(spr[SPR_LR])); //ARMABI_MOVI2M((u32)&LR, js.compilerPC + 4); } gpr.Unlock(rB); // rA gets unlocked in WriteExitDestInR @@ -290,7 +290,7 @@ void JitArm::bclrx(UGeckoInstruction inst) ARMReg rA = gpr.GetReg(false); u32 Jumpto = js.compilerPC + 4; MOVI2R(rA, Jumpto); - STR(R9, rA, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_LR])); + STR(R9, rA, PPCSTATE_OFF(spr[SPR_LR])); // ARMABI_MOVI2M((u32)&LR, js.compilerPC + 4); } return; @@ -303,9 +303,9 @@ void JitArm::bclrx(UGeckoInstruction inst) FixupBranch pCTRDontBranch; if ((inst.BO & BO_DONT_DECREMENT_FLAG) == 0) // Decrement and test CTR { - LDR(rB, R9, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_CTR])); + LDR(rB, R9, PPCSTATE_OFF(spr[SPR_CTR])); SUBS(rB, rB, 1); - STR(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_CTR])); + STR(R9, rB, PPCSTATE_OFF(spr[SPR_CTR])); //SUB(32, M(&CTR), Imm8(1)); if (inst.BO & BO_BRANCH_IF_CTR_0) @@ -317,7 +317,7 @@ void JitArm::bclrx(UGeckoInstruction inst) FixupBranch pConditionDontBranch; if ((inst.BO & BO_DONT_CHECK_CONDITION) == 0) // Test a CR bit { - LDRB(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, cr_fast) + (inst.BI >> 2)); + LDRB(rA, R9, PPCSTATE_OFF(cr_fast) + (inst.BI >> 2)); TST(rA, 8 >> (inst.BI & 3)); //TEST(8, M(&PowerPC::ppcState.cr_fast[inst.BI >> 2]), Imm8(8 >> (inst.BI & 3))); if (inst.BO & BO_BRANCH_IF_TRUE) // Conditional branch @@ -336,12 +336,12 @@ void JitArm::bclrx(UGeckoInstruction inst) //MOV(32, R(EAX), M(&LR)); //AND(32, R(EAX), Imm32(0xFFFFFFFC)); MVN(rB, 0x3); // 0xFFFFFFFC - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_LR])); + LDR(rA, R9, PPCSTATE_OFF(spr[SPR_LR])); AND(rA, rA, rB); if (inst.LK){ u32 Jumpto = js.compilerPC + 4; MOVI2R(rB, Jumpto); - STR(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, spr[SPR_LR])); + STR(R9, rB, PPCSTATE_OFF(spr[SPR_LR])); //ARMABI_MOVI2M((u32)&LR, js.compilerPC + 4); } gpr.Unlock(rB); // rA gets unlocked in WriteExitDestInR diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp index 4b77830ef3..964bd575c4 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp @@ -40,7 +40,7 @@ void JitArm::GenerateRC(int cr) { SetCC(CC_MI); MOV(rB, 0x8); // Result < 0 SetCC(); - STRB(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, cr_fast) + cr); + STRB(R9, rB, PPCSTATE_OFF(cr_fast) + cr); gpr.Unlock(rB); } void JitArm::ComputeRC(int cr) { @@ -51,7 +51,7 @@ void JitArm::ComputeRC(int cr) { SetCC(CC_GT); MOV(rB, 0x4); // Result > 0 SetCC(); - STRB(R9, rB, PPCSTATE_OFF(PowerPC::ppcState, cr_fast) + cr); + STRB(R9, rB, PPCSTATE_OFF(cr_fast) + cr); gpr.Unlock(rB); } @@ -232,7 +232,7 @@ void JitArm::cmpli(UGeckoInstruction inst) SetCC(CC_HI); MOV(rA, 0x4); // Result > 0 SetCC(); - STRB(R9, rA, PPCSTATE_OFF(PowerPC::ppcState, cr_fast) + crf); + STRB(R9, rA, PPCSTATE_OFF(cr_fast) + crf); gpr.Unlock(rA); } diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp index dd9f7cd807..9d248ebd02 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp @@ -100,7 +100,7 @@ void JitArm::stwu(UGeckoInstruction inst) // Check and set the update before writing since calling a function can // mess with the "special registers R11+ which may cause some issues. - LDR(Function, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(Function, R9, PPCSTATE_OFF(Exceptions)); CMP(Function, EXCEPTION_DSI); FixupBranch DoNotWrite = B_CC(CC_EQ); MOV(RA, Addr); @@ -198,7 +198,7 @@ void JitArm::lbz(UGeckoInstruction inst) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); ARMReg RD = gpr.R(inst.RD); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(rA, R9, PPCSTATE_OFF(Exceptions)); CMP(rA, EXCEPTION_DSI); FixupBranch DoNotLoad = B_CC(CC_EQ); #if FASTMEM @@ -245,7 +245,7 @@ void JitArm::lhz(UGeckoInstruction inst) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); ARMReg RD = gpr.R(inst.RD); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(rA, R9, PPCSTATE_OFF(Exceptions)); CMP(rA, EXCEPTION_DSI); FixupBranch DoNotLoad = B_CC(CC_EQ); #if 0 // FASTMEM @@ -295,7 +295,7 @@ void JitArm::lwz(UGeckoInstruction inst) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); ARMReg RD = gpr.R(inst.RD); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(rA, R9, PPCSTATE_OFF(Exceptions)); CMP(rA, EXCEPTION_DSI); FixupBranch DoNotLoad = B_CC(CC_EQ); @@ -369,7 +369,7 @@ void JitArm::lwzx(UGeckoInstruction inst) ARMReg RB = gpr.R(inst.RB); ARMReg RD = gpr.R(inst.RD); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(rA, R9, PPCSTATE_OFF(Exceptions)); CMP(rA, EXCEPTION_DSI); FixupBranch DoNotLoad = B_CC(CC_EQ); #if FASTMEM diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp index 5134dd9e88..dd36f145a9 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp @@ -40,7 +40,7 @@ void JitArm::lfs(UGeckoInstruction inst) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); - LDR(rA, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(rA, R9, PPCSTATE_OFF(Exceptions)); CMP(rA, EXCEPTION_DSI); FixupBranch DoNotLoad = B_CC(CC_EQ); diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp index 512240537a..bbad7b780a 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp @@ -70,7 +70,7 @@ void JitArm::mtspr(UGeckoInstruction inst) } // OK, this is easy. - STR(R9, RD, PPCSTATE_OFF(PowerPC::ppcState, spr) + iIndex * 4); + STR(R9, RD, PPCSTATE_OFF(spr) + iIndex * 4); } void JitArm::mfspr(UGeckoInstruction inst) @@ -89,7 +89,7 @@ void JitArm::mfspr(UGeckoInstruction inst) Default(inst); return; default: - LDR(RD, R9, PPCSTATE_OFF(PowerPC::ppcState, spr) + iIndex * 4); + LDR(RD, R9, PPCSTATE_OFF(spr) + iIndex * 4); break; } } @@ -99,6 +99,6 @@ void JitArm::mtmsr(UGeckoInstruction inst) // Don't interpret this, if we do we get thrown out //JITDISABLE(SystemRegisters) - STR(R9, gpr.R(inst.RS), PPCSTATE_OFF(PowerPC::ppcState, msr)); + STR(R9, gpr.R(inst.RS), PPCSTATE_OFF(msr)); WriteExit(js.compilerPC + 4, 0); } diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp index 5084ab44d6..a5ae0a1e81 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp @@ -63,7 +63,7 @@ void JitArmAsmRoutineManager::Generate() // This block of code gets the address of the compiled block of code // It runs though to the compiling portion if it isn't found - LDR(R12, R9, PPCSTATE_OFF(PowerPC::ppcState, pc));// Load the current PC into R12 + LDR(R12, R9, PPCSTATE_OFF(pc));// Load the current PC into R12 MOVI2R(R14, JIT_ICACHE_MASK); // Potential for optimization AND(R12, R12, R14); // R12 contains PC & JIT_ICACHE_MASK here. @@ -92,7 +92,7 @@ void JitArmAsmRoutineManager::Generate() // If we get to this point, that means that we don't have the block cached to execute // So call ArmJit to compile the block and then execute it. MOVI2R(R14, (u32)&Jit); - LDR(R0, R9, PPCSTATE_OFF(PowerPC::ppcState, pc)); + LDR(R0, R9, PPCSTATE_OFF(pc)); BL(R14); B(dispatcherNoCheck); @@ -100,12 +100,12 @@ void JitArmAsmRoutineManager::Generate() // fpException() // Floating Point Exception Check, Jumped to if false fpException = GetCodePtr(); - LDR(R0, R9, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + LDR(R0, R9, PPCSTATE_OFF(Exceptions)); ORR(R0, R0, EXCEPTION_FPU_UNAVAILABLE); - STR(R9, R0, PPCSTATE_OFF(PowerPC::ppcState, Exceptions)); + STR(R9, R0, PPCSTATE_OFF(Exceptions)); QuickCallFunction(R14, (void*)&PowerPC::CheckExceptions); - LDR(R0, R9, PPCSTATE_OFF(PowerPC::ppcState, npc)); - STR(R9, R0, PPCSTATE_OFF(PowerPC::ppcState, pc)); + LDR(R0, R9, PPCSTATE_OFF(npc)); + STR(R9, R0, PPCSTATE_OFF(pc)); B(dispatcher); SetJumpTarget(bail); @@ -116,11 +116,11 @@ void JitArmAsmRoutineManager::Generate() // Does exception checking testExceptions = GetCodePtr(); - LDR(R0, R9, PPCSTATE_OFF(PowerPC::ppcState, pc)); - STR(R9, R0, PPCSTATE_OFF(PowerPC::ppcState, npc)); + LDR(R0, R9, PPCSTATE_OFF(pc)); + STR(R9, R0, PPCSTATE_OFF(npc)); QuickCallFunction(R14, (void*)&PowerPC::CheckExceptions); - LDR(R0, R9, PPCSTATE_OFF(PowerPC::ppcState, npc)); - STR(R9, R0, PPCSTATE_OFF(PowerPC::ppcState, pc)); + LDR(R0, R9, PPCSTATE_OFF(npc)); + STR(R9, R0, PPCSTATE_OFF(pc)); // Check the state pointer to see if we are exiting // Gets checked on every exception check MOVI2R(R0, (u32)PowerPC::GetStatePtr()); diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitFPRCache.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitFPRCache.cpp index 99139d2c71..535f8446c7 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitFPRCache.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitFPRCache.cpp @@ -123,7 +123,7 @@ ARMReg ArmFPRCache::GetPPCReg(u32 preg, bool PS1, bool preLoad) for (u8 a = 0; a < NUMPPCREG; ++a) if (ArmCRegs[a].PPCReg == 33) { - u16 offset = PPCSTATE_OFF(PowerPC::ppcState, ps) + (preg * 16) + (PS1 ? 8 : 0); + u16 offset = PPCSTATE_OFF(ps) + (preg * 16) + (PS1 ? 8 : 0); if (preLoad) emit->VLDR(ArmCRegs[a].Reg, R9, offset); ArmCRegs[a].PPCReg = preg; @@ -132,10 +132,10 @@ ARMReg ArmFPRCache::GetPPCReg(u32 preg, bool PS1, bool preLoad) return ArmCRegs[a].Reg; } // Alright, we couldn't get a free space, dump that least used register - u16 offsetOld = PPCSTATE_OFF(PowerPC::ppcState, ps) + (ArmCRegs[Num].PPCReg * 16) + (ArmCRegs[Num].PS1 ? 8 : 0); + u16 offsetOld = PPCSTATE_OFF(ps) + (ArmCRegs[Num].PPCReg * 16) + (ArmCRegs[Num].PS1 ? 8 : 0); emit->VSTR(ArmCRegs[Num].Reg, R9, offsetOld); - u16 offsetNew = PPCSTATE_OFF(PowerPC::ppcState, ps) + (preg * 16) + (PS1 ? 8 : 0); + u16 offsetNew = PPCSTATE_OFF(ps) + (preg * 16) + (PS1 ? 8 : 0); if (preLoad) emit->VLDR(ArmCRegs[Num].Reg, R9, offsetNew); ArmCRegs[Num].PPCReg = preg; @@ -160,7 +160,7 @@ void ArmFPRCache::Flush() for(u8 a = 0; a < NUMPPCREG; ++a) if (ArmCRegs[a].PPCReg != 33) { - u16 offset = PPCSTATE_OFF(PowerPC::ppcState, ps) + (ArmCRegs[a].PPCReg * 16) + (ArmCRegs[a].PS1 ? 8 : 0); + u16 offset = PPCSTATE_OFF(ps) + (ArmCRegs[a].PPCReg * 16) + (ArmCRegs[a].PS1 ? 8 : 0); emit->VSTR(ArmCRegs[a].Reg, R9, offset); ArmCRegs[a].PPCReg = 33; ArmCRegs[a].LastLoad = 0; diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitRegCache.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitRegCache.cpp index 0e5bc8d68a..18777fd8c9 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitRegCache.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitRegCache.cpp @@ -142,14 +142,14 @@ ARMReg ArmRegCache::R(u32 preg) for (u8 a = 0; a < NUMPPCREG; ++a) if (ArmCRegs[a].PPCReg == 33) { - emit->LDR(ArmCRegs[a].Reg, R9, PPCSTATE_OFF(PowerPC::ppcState, gpr) + preg * 4); + emit->LDR(ArmCRegs[a].Reg, R9, PPCSTATE_OFF(gpr) + preg * 4); ArmCRegs[a].PPCReg = preg; ArmCRegs[a].LastLoad = 0; return ArmCRegs[a].Reg; } // Alright, we couldn't get a free space, dump that least used register - emit->STR(R9, ArmCRegs[Num].Reg, PPCSTATE_OFF(PowerPC::ppcState, gpr) + ArmCRegs[Num].PPCReg * 4); - emit->LDR(ArmCRegs[Num].Reg, R9, PPCSTATE_OFF(PowerPC::ppcState, gpr) + preg * 4); + emit->STR(R9, ArmCRegs[Num].Reg, PPCSTATE_OFF(gpr) + ArmCRegs[Num].PPCReg * 4); + emit->LDR(ArmCRegs[Num].Reg, R9, PPCSTATE_OFF(gpr) + preg * 4); ArmCRegs[Num].PPCReg = preg; ArmCRegs[Num].LastLoad = 0; return ArmCRegs[Num].Reg; @@ -160,7 +160,7 @@ void ArmRegCache::Flush() for(u8 a = 0; a < NUMPPCREG; ++a) if (ArmCRegs[a].PPCReg != 33) { - emit->STR(R9, ArmCRegs[a].Reg, PPCSTATE_OFF(PowerPC::ppcState, gpr) + ArmCRegs[a].PPCReg * 4); + emit->STR(R9, ArmCRegs[a].Reg, PPCSTATE_OFF(gpr) + ArmCRegs[a].PPCReg * 4); ArmCRegs[a].PPCReg = 33; ArmCRegs[a].LastLoad = 0; } From eaa5a77d9e07b181ffec6ea07b75c64054112a9b Mon Sep 17 00:00:00 2001 From: degasus Date: Wed, 6 Mar 2013 20:47:48 +0100 Subject: [PATCH 2/4] fix debug build --- Source/Core/Common/Src/ChunkFile.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Source/Core/Common/Src/ChunkFile.h b/Source/Core/Common/Src/ChunkFile.h index 3c0a58f678..da468b9910 100644 --- a/Source/Core/Common/Src/ChunkFile.h +++ b/Source/Core/Common/Src/ChunkFile.h @@ -246,9 +246,9 @@ private: break; case MODE_VERIFY: - _dbg_assert_msg_(COMMON, (x == *ptr), + _dbg_assert_msg_(COMMON, (x == **ptr), "Savestate verification failure: %d (0x%X) (at %p) != %d (0x%X) (at %p).\n", - x, x, &x, *ptr, *ptr, &*ptr); + x, x, &x, **ptr, **ptr, *ptr); break; default: From f3528277c4efefd98cb1c591bd0c378976782883 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Thu, 7 Mar 2013 09:52:38 -0600 Subject: [PATCH 3/4] Make sure to mask out the FPU rounding mode correctly. Good spot from LionCash. --- Source/Core/Common/Src/x64FPURoundMode.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Source/Core/Common/Src/x64FPURoundMode.cpp b/Source/Core/Common/Src/x64FPURoundMode.cpp index 0beefd860a..447beb3625 100644 --- a/Source/Core/Common/Src/x64FPURoundMode.cpp +++ b/Source/Core/Common/Src/x64FPURoundMode.cpp @@ -84,7 +84,7 @@ namespace FPURoundMode }; unsigned short _mode; asm ("fstcw %0" : : "m" (_mode)); - _mode = (_mode & ~table[4]) | table[mode]; + _mode = (_mode & ~table[3]) | table[mode]; asm ("fldcw %0" : : "m" (_mode)); #endif #else From 279e3c7e14d7a981ad29397b9af6f4b483cd36dc Mon Sep 17 00:00:00 2001 From: lioncash Date: Thu, 7 Mar 2013 10:59:50 -0500 Subject: [PATCH 4/4] Fix a potential memory leak in function DecompressBlobToFile in CompressedBlob.cpp --- Source/Core/DiscIO/Src/CompressedBlob.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Source/Core/DiscIO/Src/CompressedBlob.cpp b/Source/Core/DiscIO/Src/CompressedBlob.cpp index c4b1aa1385..2bc4a93ede 100644 --- a/Source/Core/DiscIO/Src/CompressedBlob.cpp +++ b/Source/Core/DiscIO/Src/CompressedBlob.cpp @@ -301,7 +301,10 @@ bool DecompressBlobToFile(const char* infile, const char* outfile, CompressCB ca File::IOFile f(outfile, "wb"); if (!f) + { + delete reader; return false; + } const CompressedBlobHeader &header = reader->GetHeader(); u8* buffer = new u8[header.block_size];