From e3a784ffbaa3e3d00a9ee614a2f6c482456fdca4 Mon Sep 17 00:00:00 2001 From: "Admiral H. Curtiss" Date: Sat, 7 Aug 2021 00:07:40 +0200 Subject: [PATCH 1/4] PowerPC: Convert enum in TranslateAddressResult to enum class. --- Source/Core/Core/PowerPC/MMU.cpp | 39 +++++++++++++++++--------------- 1 file changed, 21 insertions(+), 18 deletions(-) diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp index d076ab94e1..eeda106d8d 100644 --- a/Source/Core/Core/PowerPC/MMU.cpp +++ b/Source/Core/Core/PowerPC/MMU.cpp @@ -99,18 +99,20 @@ static bool IsNoExceptionFlag(XCheckTLBFlag flag) return flag == XCheckTLBFlag::NoException || flag == XCheckTLBFlag::OpcodeNoException; } +enum class TranslateAddressResultEnum : u8 +{ + BAT_TRANSLATED, + PAGE_TABLE_TRANSLATED, + DIRECT_STORE_SEGMENT, + PAGE_FAULT, +}; + struct TranslateAddressResult { - enum - { - BAT_TRANSLATED, - PAGE_TABLE_TRANSLATED, - DIRECT_STORE_SEGMENT, - PAGE_FAULT - } result; + TranslateAddressResultEnum result; u32 address; bool wi; // Set to true if the view of memory is either write-through or cache-inhibited - bool Success() const { return result <= PAGE_TABLE_TRANSLATED; } + bool Success() const { return result <= TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED; } }; template static TranslateAddressResult TranslateAddress(u32 address); @@ -444,7 +446,7 @@ TryReadInstResult TryReadInstruction(u32 address) else { address = tlb_addr.address; - from_bat = tlb_addr.result == TranslateAddressResult::BAT_TRANSLATED; + from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED; } } @@ -1023,14 +1025,14 @@ void ClearCacheLine(u32 address) if (MSR.DR) { auto translated_address = TranslateAddress(address); - if (translated_address.result == TranslateAddressResult::DIRECT_STORE_SEGMENT) + if (translated_address.result == TranslateAddressResultEnum::DIRECT_STORE_SEGMENT) { // dcbz to direct store segments is ignored. This is a little // unintuitive, but this is consistent with both console and the PEM. // Advance Game Port crashes if we don't emulate this correctly. return; } - if (translated_address.result == TranslateAddressResult::PAGE_FAULT) + if (translated_address.result == TranslateAddressResultEnum::PAGE_FAULT) { // If translation fails, generate a DSI. GenerateDSIException(address, true); @@ -1099,7 +1101,7 @@ TranslateResult JitCache_TranslateAddress(u32 address) return TranslateResult{false, false, 0}; } - bool from_bat = tlb_addr.result == TranslateAddressResult::BAT_TRANSLATED; + bool from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED; return TranslateResult{true, from_bat, tlb_addr.address}; } @@ -1343,12 +1345,13 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe u32 translatedAddress = 0; TLBLookupResult res = LookupTLBPageAddress(flag, address, &translatedAddress, wi); if (res == TLBLookupResult::Found) - return TranslateAddressResult{TranslateAddressResult::PAGE_TABLE_TRANSLATED, translatedAddress}; + return TranslateAddressResult{TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED, + translatedAddress}; u32 sr = PowerPC::ppcState.sr[EA_SR(address)]; if (sr & 0x80000000) - return TranslateAddressResult{TranslateAddressResult::DIRECT_STORE_SEGMENT, 0}; + return TranslateAddressResult{TranslateAddressResultEnum::DIRECT_STORE_SEGMENT, 0}; // TODO: Handle KS/KP segment register flags. @@ -1356,7 +1359,7 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe if ((flag == XCheckTLBFlag::Opcode || flag == XCheckTLBFlag::OpcodeNoException) && (sr & 0x10000000)) { - return TranslateAddressResult{TranslateAddressResult::PAGE_FAULT, 0}; + return TranslateAddressResult{TranslateAddressResultEnum::PAGE_FAULT, 0}; } u32 offset = EA_Offset(address); // 12 bit @@ -1418,12 +1421,12 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe *wi = (PTE2.WIMG & 0b1100) != 0; - return TranslateAddressResult{TranslateAddressResult::PAGE_TABLE_TRANSLATED, + return TranslateAddressResult{TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED, (PTE2.RPN << 12) | offset}; } } } - return TranslateAddressResult{TranslateAddressResult::PAGE_FAULT, 0}; + return TranslateAddressResult{TranslateAddressResultEnum::PAGE_FAULT, 0}; } static void UpdateBATs(BatTable& bat_table, u32 base_spr) @@ -1583,7 +1586,7 @@ static TranslateAddressResult TranslateAddress(u32 address) bool wi = false; if (TranslateBatAddess(IsOpcodeFlag(flag) ? ibat_table : dbat_table, &address, &wi)) - return TranslateAddressResult{TranslateAddressResult::BAT_TRANSLATED, address, wi}; + return TranslateAddressResult{TranslateAddressResultEnum::BAT_TRANSLATED, address, wi}; return TranslatePageAddress(address, flag, &wi); } From 3296d2fc1fe52bb27640c6a9e3657d5919c2a04c Mon Sep 17 00:00:00 2001 From: "Admiral H. Curtiss" Date: Sat, 7 Aug 2021 00:30:16 +0200 Subject: [PATCH 2/4] PowerPC: Reorder members of TranslateAddressResult to reduce struct size. --- Source/Core/Core/PowerPC/MMU.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp index eeda106d8d..6419e94729 100644 --- a/Source/Core/Core/PowerPC/MMU.cpp +++ b/Source/Core/Core/PowerPC/MMU.cpp @@ -109,9 +109,14 @@ enum class TranslateAddressResultEnum : u8 struct TranslateAddressResult { - TranslateAddressResultEnum result; u32 address; + TranslateAddressResultEnum result; bool wi; // Set to true if the view of memory is either write-through or cache-inhibited + + TranslateAddressResult(TranslateAddressResultEnum result_, u32 address_, bool wi_ = false) + : address(address_), result(result_), wi(wi_) + { + } bool Success() const { return result <= TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED; } }; template From 95fbd096912c0a0be02e7c7eb728009add2de8a1 Mon Sep 17 00:00:00 2001 From: "Admiral H. Curtiss" Date: Mon, 9 Aug 2021 01:18:29 +0200 Subject: [PATCH 3/4] PowerPC: Update variable name conventions and const-ness around calls to JitCache_TranslateAddress(). --- Source/Core/Core/PowerPC/JitCommon/JitCache.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp b/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp index 898a87b0ef..e09443dcc8 100644 --- a/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp +++ b/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp @@ -96,10 +96,10 @@ void JitBaseBlockCache::RunOnBlocks(std::function f) JitBlock* JitBaseBlockCache::AllocateBlock(u32 em_address) { - u32 physicalAddress = PowerPC::JitCache_TranslateAddress(em_address).address; - JitBlock& b = block_map.emplace(physicalAddress, JitBlock())->second; + const u32 physical_address = PowerPC::JitCache_TranslateAddress(em_address).address; + JitBlock& b = block_map.emplace(physical_address, JitBlock())->second; b.effectiveAddress = em_address; - b.physicalAddress = physicalAddress; + b.physicalAddress = physical_address; b.msrBits = MSR.Hex & JIT_CACHE_MSR_MASK; b.linkData.clear(); b.fast_block_map_index = 0; @@ -185,25 +185,25 @@ const u8* JitBaseBlockCache::Dispatch() void JitBaseBlockCache::InvalidateICache(u32 address, u32 length, bool forced) { - auto translated = PowerPC::JitCache_TranslateAddress(address); + const auto translated = PowerPC::JitCache_TranslateAddress(address); if (!translated.valid) return; - u32 pAddr = translated.address; + const u32 physical_address = translated.address; // Optimize the common case of length == 32 which is used by Interpreter::dcb* bool destroy_block = true; if (length == 32) { - if (!valid_block.Test(pAddr / 32)) + if (!valid_block.Test(physical_address / 32)) destroy_block = false; else - valid_block.Clear(pAddr / 32); + valid_block.Clear(physical_address / 32); } if (destroy_block) { // destroy JIT blocks - ErasePhysicalRange(pAddr, length); + ErasePhysicalRange(physical_address, length); // If the code was actually modified, we need to clear the relevant entries from the // FIFO write address cache, so we don't end up with FIFO checks in places they shouldn't From 116d1361d53d3d3174df2e093ace2d74a488d874 Mon Sep 17 00:00:00 2001 From: "Admiral H. Curtiss" Date: Mon, 9 Aug 2021 01:19:22 +0200 Subject: [PATCH 4/4] PowerPC: Let callers of JitCache_TranslateAddress determine whether the address was translated. --- Source/Core/Core/PowerPC/MMU.cpp | 12 +++++------- Source/Core/Core/PowerPC/MMU.h | 14 +++++++++++--- 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp index 6419e94729..ab9edf71a7 100644 --- a/Source/Core/Core/PowerPC/MMU.cpp +++ b/Source/Core/Core/PowerPC/MMU.cpp @@ -1097,17 +1097,15 @@ bool IsOptimizableGatherPipeWrite(u32 address) TranslateResult JitCache_TranslateAddress(u32 address) { if (!MSR.IR) - return TranslateResult{true, true, address}; + return TranslateResult{address}; // TODO: We shouldn't use FLAG_OPCODE if the caller is the debugger. - auto tlb_addr = TranslateAddress(address); + const auto tlb_addr = TranslateAddress(address); if (!tlb_addr.Success()) - { - return TranslateResult{false, false, 0}; - } + return TranslateResult{}; - bool from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED; - return TranslateResult{true, from_bat, tlb_addr.address}; + const bool from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED; + return TranslateResult{from_bat, tlb_addr.address}; } // ********************************************************************************* diff --git a/Source/Core/Core/PowerPC/MMU.h b/Source/Core/Core/PowerPC/MMU.h index 9e2a3a0196..ab02ad01d8 100644 --- a/Source/Core/Core/PowerPC/MMU.h +++ b/Source/Core/Core/PowerPC/MMU.h @@ -189,9 +189,17 @@ bool IsOptimizableGatherPipeWrite(u32 address); struct TranslateResult { - bool valid; - bool from_bat; - u32 address; + bool valid = false; + bool translated = false; + bool from_bat = false; + u32 address = 0; + + TranslateResult() = default; + explicit TranslateResult(u32 address_) : valid(true), address(address_) {} + TranslateResult(bool from_bat_, u32 address_) + : valid(true), translated(true), from_bat(from_bat_), address(address_) + { + } }; TranslateResult JitCache_TranslateAddress(u32 address);