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PowerPC: Parametrize MMCR0 macro.

This commit is contained in:
Admiral H. Curtiss 2023-01-09 20:59:35 +01:00
parent 38529a2d8d
commit 126590c4cd
No known key found for this signature in database
GPG Key ID: F051B4C4044F33FB
4 changed files with 9 additions and 9 deletions
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2
Source/Core/Core/PowerPC/Jit64/Jit.cpp
View File

@ -534,7 +534,7 @@ bool Jit64::Cleanup()
} }
// SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time. // SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time.
if (MMCR0.Hex || MMCR1.Hex) if (MMCR0(PowerPC::ppcState).Hex || MMCR1.Hex)
{ {
ABI_PushRegistersAndAdjustStack({}, 0); ABI_PushRegistersAndAdjustStack({}, 0);
ABI_CallFunctionCCC(PowerPC::UpdatePerformanceMonitor, js.downcountAmount, js.numLoadStoreInst, ABI_CallFunctionCCC(PowerPC::UpdatePerformanceMonitor, js.downcountAmount, js.numLoadStoreInst,

2
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
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@ -288,7 +288,7 @@ void JitArm64::Cleanup()
} }
// SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time. // SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time.
if (MMCR0.Hex || MMCR1.Hex) if (MMCR0(PowerPC::ppcState).Hex || MMCR1.Hex)
{ {
MOVP2R(ARM64Reg::X8, &PowerPC::UpdatePerformanceMonitor); MOVP2R(ARM64Reg::X8, &PowerPC::UpdatePerformanceMonitor);
MOVI2R(ARM64Reg::X0, js.downcountAmount); MOVI2R(ARM64Reg::X0, js.downcountAmount);

12
Source/Core/Core/PowerPC/PowerPC.cpp
View File

@ -405,7 +405,7 @@ void WriteFullTimeBaseValue(u64 value)
void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst) void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst)
{ {
switch (MMCR0.PMC1SELECT) switch (MMCR0(PowerPC::ppcState).PMC1SELECT)
{ {
case 0: // No change case 0: // No change
break; break;
@ -416,7 +416,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst)
break; break;
} }
switch (MMCR0.PMC2SELECT) switch (MMCR0(PowerPC::ppcState).PMC2SELECT)
{ {
case 0: // No change case 0: // No change
break; break;
@ -455,10 +455,10 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst)
break; break;
} }
if ((MMCR0.PMC1INTCONTROL && (PowerPC::ppcState.spr[SPR_PMC1] & 0x80000000) != 0) || if ((MMCR0(PowerPC::ppcState).PMC1INTCONTROL && (PowerPC::ppcState.spr[SPR_PMC1] & 0x80000000) != 0) ||
(MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC2] & 0x80000000) != 0) || (MMCR0(PowerPC::ppcState).PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC2] & 0x80000000) != 0) ||
(MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC3] & 0x80000000) != 0) || (MMCR0(PowerPC::ppcState).PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC3] & 0x80000000) != 0) ||
(MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC4] & 0x80000000) != 0)) (MMCR0(PowerPC::ppcState).PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC4] & 0x80000000) != 0))
PowerPC::ppcState.Exceptions |= EXCEPTION_PERFORMANCE_MONITOR; PowerPC::ppcState.Exceptions |= EXCEPTION_PERFORMANCE_MONITOR;
} }

2
Source/Core/Core/PowerPC/PowerPC.h
View File

@ -240,7 +240,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
#define HID4(ppc_state) ((UReg_HID4&)(ppc_state).spr[SPR_HID4]) #define HID4(ppc_state) ((UReg_HID4&)(ppc_state).spr[SPR_HID4])
#define DMAU(ppc_state) (*(UReg_DMAU*)&(ppc_state).spr[SPR_DMAU]) #define DMAU(ppc_state) (*(UReg_DMAU*)&(ppc_state).spr[SPR_DMAU])
#define DMAL(ppc_state) (*(UReg_DMAL*)&(ppc_state).spr[SPR_DMAL]) #define DMAL(ppc_state) (*(UReg_DMAL*)&(ppc_state).spr[SPR_DMAL])
#define MMCR0 ((UReg_MMCR0&)PowerPC::ppcState.spr[SPR_MMCR0]) #define MMCR0(ppc_state) ((UReg_MMCR0&)(ppc_state).spr[SPR_MMCR0])
#define MMCR1 ((UReg_MMCR1&)PowerPC::ppcState.spr[SPR_MMCR1]) #define MMCR1 ((UReg_MMCR1&)PowerPC::ppcState.spr[SPR_MMCR1])
#define THRM1 ((UReg_THRM12&)PowerPC::ppcState.spr[SPR_THRM1]) #define THRM1 ((UReg_THRM12&)PowerPC::ppcState.spr[SPR_THRM1])
#define THRM2 ((UReg_THRM12&)PowerPC::ppcState.spr[SPR_THRM2]) #define THRM2 ((UReg_THRM12&)PowerPC::ppcState.spr[SPR_THRM2])