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Merge pull request #12107 from MikeIsAStar/retrieve-page-table-information-from-data-cache 

Retrieve page table information from the data cache
This commit is contained in:
Pokechu22 2023-08-15 22:01:01 -07:00 committed by GitHub
parent a10d768c63 0bb5c88a22
commit 10c5da6f62
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 7 additions and 7 deletions
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10
Source/Core/Core/PowerPC/MMU.cpp
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@ -1387,8 +1387,8 @@ void MMU::InvalidateTLBEntry(u32 address)
} }
// Page Address Translation // Page Address Translation
MMU::TranslateAddressResult MMU::TranslatePageAddress(const EffectiveAddress address, template <const XCheckTLBFlag flag>
const XCheckTLBFlag flag, bool* wi) MMU::TranslateAddressResult MMU::TranslatePageAddress(const EffectiveAddress address, bool* wi)
{ {
// TLB cache // TLB cache
// This catches 99%+ of lookups in practice, so the actual page table entry code below doesn't // This catches 99%+ of lookups in practice, so the actual page table entry code below doesn't
@ -1441,11 +1441,11 @@ MMU::TranslateAddressResult MMU::TranslatePageAddress(const EffectiveAddress add
for (int i = 0; i < 8; i++, pteg_addr += 8) for (int i = 0; i < 8; i++, pteg_addr += 8)
{ {
const u32 pteg = m_memory.Read_U32(pteg_addr); const u32 pteg = ReadFromHardware<flag, u32, true>(pteg_addr);
if (pte1.Hex == pteg) if (pte1.Hex == pteg)
{ {
UPTE_Hi pte2(m_memory.Read_U32(pteg_addr + 4)); UPTE_Hi pte2(ReadFromHardware<flag, u32, true>(pteg_addr + 4));
// set the access bits // set the access bits
switch (flag) switch (flag)
@ -1643,7 +1643,7 @@ MMU::TranslateAddressResult MMU::TranslateAddress(u32 address)
if (TranslateBatAddress(IsOpcodeFlag(flag) ? m_ibat_table : m_dbat_table, &address, &wi)) if (TranslateBatAddress(IsOpcodeFlag(flag) ? m_ibat_table : m_dbat_table, &address, &wi))
return TranslateAddressResult{TranslateAddressResultEnum::BAT_TRANSLATED, address, wi}; return TranslateAddressResult{TranslateAddressResultEnum::BAT_TRANSLATED, address, wi};
return TranslatePageAddress(EffectiveAddress{address}, flag, &wi); return TranslatePageAddress<flag>(EffectiveAddress{address}, &wi);
} }
std::optional<u32> MMU::GetTranslatedAddress(u32 address) std::optional<u32> MMU::GetTranslatedAddress(u32 address)

4
Source/Core/Core/PowerPC/MMU.h
View File

@ -292,8 +292,8 @@ private:
template <const XCheckTLBFlag flag> template <const XCheckTLBFlag flag>
TranslateAddressResult TranslateAddress(u32 address); TranslateAddressResult TranslateAddress(u32 address);
TranslateAddressResult TranslatePageAddress(const EffectiveAddress address, template <const XCheckTLBFlag flag>
const XCheckTLBFlag flag, bool* wi); TranslateAddressResult TranslatePageAddress(const EffectiveAddress address, bool* wi);
void GenerateDSIException(u32 effective_address, bool write); void GenerateDSIException(u32 effective_address, bool write);
void GenerateISIException(u32 effective_address); void GenerateISIException(u32 effective_address);