JitArm64: Implement mtfsfix

Part 5 of 6 of implementing the FPSCR system register instructions.

Source/Core/Core/PowerPC/JitArm64/Jit.h

@@ -121,6 +121,7 @@ public:
   void mffsx(UGeckoInstruction inst);
   void mtfsb0x(UGeckoInstruction inst);
   void mtfsb1x(UGeckoInstruction inst);
+  void mtfsfix(UGeckoInstruction inst);
 
   // LoadStore
   void lXX(UGeckoInstruction inst);

Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp

@@ -816,3 +816,39 @@ void JitArm64::mtfsb1x(UGeckoInstruction inst)
   if (inst.CRBD >= 29)
     UpdateRoundingMode();
 }
+
+void JitArm64::mtfsfix(UGeckoInstruction inst)
+{
+  INSTRUCTION_START
+  JITDISABLE(bJITSystemRegistersOff);
+  FALLBACK_IF(inst.Rc);
+
+  u8 imm = (inst.hex >> (31 - 19)) & 0xF;
+  u8 shift = 28 - 4 * inst.CRFD;
+
+  ARM64Reg WA = gpr.GetReg();
+  LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(fpscr));
+
+  if (imm == 0xF)
+  {
+    ORR(WA, WA, LogicalImm(0xF << shift, 32));
+  }
+  else if (imm == 0x0)
+  {
+    BFI(WA, ARM64Reg::WZR, shift, 4);
+  }
+  else
+  {
+    ARM64Reg WB = gpr.GetReg();
+    MOVZ(WB, imm);
+    BFI(WA, WB, shift, 4);
+    gpr.Unlock(WB);
+  }
+
+  STR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(fpscr));
+  gpr.Unlock(WA);
+
+  // Field 7 contains NI and RN.
+  if (inst.CRFD == 7)
+    UpdateRoundingMode();
+}

Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp

@@ -318,7 +318,7 @@ constexpr std::array<GekkoOPTemplate, 15> table63{{
     {583, &JitArm64::mffsx},                  // mffsx
     {70, &JitArm64::mtfsb0x},                 // mtfsb0x
     {38, &JitArm64::mtfsb1x},                 // mtfsb1x
-    {134, &JitArm64::FallBackToInterpreter},  // mtfsfix
+    {134, &JitArm64::mtfsfix},                // mtfsfix
     {711, &JitArm64::FallBackToInterpreter},  // mtfsfx
 }};