Merge pull request #498 from magumagu/remove-daz
Don't set DAZ on x86 in non-IEEE mode.
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commit
0e0238eccf
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@ -281,8 +281,3 @@ std::string CPUInfo::Summarize()
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return sum;
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return sum;
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}
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}
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bool CPUInfo::IsUnsafe()
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{
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return false;
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}
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@ -77,7 +77,6 @@ struct CPUInfo
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// Turn the cpu info into a string we can show
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// Turn the cpu info into a string we can show
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std::string Summarize();
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std::string Summarize();
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bool IsUnsafe();
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private:
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private:
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// Detects the various cpu features
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// Detects the various cpu features
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@ -162,32 +162,10 @@ void CPUInfo::Detect()
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if ((cpu_id[2] >> 22) & 1) bMOVBE = true;
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if ((cpu_id[2] >> 22) & 1) bMOVBE = true;
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if ((cpu_id[2] >> 25) & 1) bAES = true;
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if ((cpu_id[2] >> 25) & 1) bAES = true;
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// To check DAZ support, we first need to check FXSAVE support.
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if ((cpu_id[3] >> 24) & 1)
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if ((cpu_id[3] >> 24) & 1)
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{
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{
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// We can use FXSAVE.
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// We can use FXSAVE.
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bFXSR = true;
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bFXSR = true;
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GC_ALIGNED16(u8 fx_state[512]);
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memset(fx_state, 0, sizeof(fx_state));
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#ifdef _WIN32
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#if _M_X86_32
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_fxsave(fx_state);
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#elif _M_X86_64
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_fxsave64(fx_state);
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#endif
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#else
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__asm__("fxsave %0" : "=m" (fx_state));
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#endif
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// lowest byte of MXCSR_MASK
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if ((fx_state[0x1C] >> 6) & 1)
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{
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// On x86, the FTZ field (supported since SSE1) only flushes denormal _outputs_ to zero,
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// now that we checked DAZ support (flushing denormal _inputs_ to zero),
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// we can set our generic flag.
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bFlushToZero = true;
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}
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}
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}
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// AVX support requires 3 separate checks:
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// AVX support requires 3 separate checks:
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@ -204,6 +182,9 @@ void CPUInfo::Detect()
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}
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}
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}
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}
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}
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}
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bFlushToZero = bSSE;
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if (max_ex_fn >= 0x80000004) {
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if (max_ex_fn >= 0x80000004) {
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// Extract brand string
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// Extract brand string
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__cpuid(cpu_id, 0x80000002);
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__cpuid(cpu_id, 0x80000002);
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@ -269,7 +250,3 @@ std::string CPUInfo::Summarize()
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return sum;
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return sum;
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}
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}
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bool CPUInfo::IsUnsafe()
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{
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return !bFlushToZero;
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}
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@ -62,8 +62,6 @@ namespace FPURoundMode
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{
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{
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// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
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// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
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const u32 EXCEPTION_MASK = 0x1F80;
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const u32 EXCEPTION_MASK = 0x1F80;
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// Denormals-Are-Zero (non-IEEE mode: denormal inputs are set to +/- 0)
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const u32 DAZ = 0x40;
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// Flush-To-Zero (non-IEEE mode: denormal outputs are set to +/- 0)
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// Flush-To-Zero (non-IEEE mode: denormal outputs are set to +/- 0)
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const u32 FTZ = 0x8000;
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const u32 FTZ = 0x8000;
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// lookup table for FPSCR.RN-to-MXCSR.RC translation
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// lookup table for FPSCR.RN-to-MXCSR.RC translation
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@ -76,16 +74,9 @@ namespace FPURoundMode
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};
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};
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u32 csr = simd_rounding_table[rounding_mode];
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u32 csr = simd_rounding_table[rounding_mode];
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// Some initial steppings of Pentium 4 CPUs support FTZ but not DAZ.
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// They will not flush input operands but flushing outputs only is better than nothing.
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static const u32 denormalLUT[2] =
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{
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FTZ, // flush-to-zero only
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FTZ | DAZ, // flush-to-zero and denormals-are-zero (may not be supported)
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};
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if (non_ieee_mode)
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if (non_ieee_mode)
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{
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{
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csr |= denormalLUT[cpu_info.bFlushToZero];
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csr |= FTZ;
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}
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}
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_mm_setcsr(csr);
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_mm_setcsr(csr);
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}
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}
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@ -374,10 +374,6 @@ void EmuThread()
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DisplayMessage(cpu_info.brand_string, 8000);
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DisplayMessage(cpu_info.brand_string, 8000);
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DisplayMessage(cpu_info.Summarize(), 8000);
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DisplayMessage(cpu_info.Summarize(), 8000);
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DisplayMessage(_CoreParameter.m_strFilename, 3000);
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DisplayMessage(_CoreParameter.m_strFilename, 3000);
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if (cpu_info.IsUnsafe() && (NetPlay::IsNetPlayRunning() || Movie::IsRecordingInput() || Movie::IsPlayingInput()))
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{
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PanicAlertT("Warning: Netplay/movies will desync because your CPU does not support DAZ and Dolphin does not emulate it anymore.");
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}
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Movie::Init();
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Movie::Init();
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