Merge pull request #11715 from JosJuice/dcbx-order
Jit: Change argument order for InvalidateICacheLine(s)FromJIT
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0a88c2329a
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@ -361,16 +361,13 @@ void Jit64::dcbx(UGeckoInstruction inst)
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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if (make_loop)
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{
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MOV(32, R(ABI_PARAM1), R(effective_address));
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MOV(32, R(ABI_PARAM2), R(loop_counter));
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MOV(64, R(ABI_PARAM3), Imm64(reinterpret_cast<u64>(&m_system.GetJitInterface())));
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ABI_CallFunction(JitInterface::InvalidateICacheLinesFromJIT);
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ABI_CallFunctionPRR(JitInterface::InvalidateICacheLinesFromJIT, &m_system.GetJitInterface(),
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effective_address, loop_counter);
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}
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else
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{
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MOV(32, R(ABI_PARAM1), R(effective_address));
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MOV(64, R(ABI_PARAM3), Imm64(reinterpret_cast<u64>(&m_system.GetJitInterface())));
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ABI_CallFunction(JitInterface::InvalidateICacheLineFromJIT);
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ABI_CallFunctionPR(JitInterface::InvalidateICacheLineFromJIT, &m_system.GetJitInterface(),
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effective_address);
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}
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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asm_routines.ResetStack(*this);
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@ -647,11 +647,11 @@ void JitArm64::dcbx(UGeckoInstruction inst)
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js.op[1].inst.RA_6 == b && js.op[1].inst.RD_2 == b &&
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js.op[2].inst.hex == 0x4200fff8;
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gpr.Lock(ARM64Reg::W0);
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gpr.Lock(ARM64Reg::W0, ARM64Reg::W1);
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if (make_loop)
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gpr.Lock(ARM64Reg::W1);
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gpr.Lock(ARM64Reg::W2);
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ARM64Reg WA = gpr.GetReg();
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ARM64Reg WA = ARM64Reg::W0;
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if (make_loop)
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gpr.BindToRegister(b, true);
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@ -668,8 +668,8 @@ void JitArm64::dcbx(UGeckoInstruction inst)
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ARM64Reg reg_cycle_count = gpr.GetReg();
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ARM64Reg reg_downcount = gpr.GetReg();
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loop_counter = ARM64Reg::W1;
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ARM64Reg WB = ARM64Reg::W0;
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loop_counter = ARM64Reg::W2;
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ARM64Reg WB = ARM64Reg::W1;
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// Figure out how many loops we want to do.
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const u8 cycle_count_per_loop =
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@ -709,7 +709,7 @@ void JitArm64::dcbx(UGeckoInstruction inst)
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gpr.Unlock(reg_cycle_count, reg_downcount);
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}
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ARM64Reg effective_addr = ARM64Reg::W0;
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ARM64Reg effective_addr = ARM64Reg::W1;
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ARM64Reg physical_addr = gpr.GetReg();
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if (a)
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@ -770,8 +770,8 @@ void JitArm64::dcbx(UGeckoInstruction inst)
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ABI_PushRegisters(gprs_to_push);
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m_float_emit.ABI_PushRegisters(fprs_to_push, WA);
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// The first two function call arguments are already in the correct registers
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MOVP2R(ARM64Reg::X2, &m_system.GetJitInterface());
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MOVP2R(ARM64Reg::X0, &m_system.GetJitInterface());
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// effective_address and loop_counter are already in W1 and W2 respectively
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if (make_loop)
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MOVP2R(ARM64Reg::X8, &JitInterface::InvalidateICacheLinesFromJIT);
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else
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@ -257,12 +257,12 @@ void JitInterface::InvalidateICacheLines(u32 address, u32 count)
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InvalidateICache(address & ~0x1f, 32 * count, false);
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}
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void JitInterface::InvalidateICacheLineFromJIT(u32 address, u32 dummy, JitInterface& jit_interface)
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void JitInterface::InvalidateICacheLineFromJIT(JitInterface& jit_interface, u32 address)
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{
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jit_interface.InvalidateICacheLine(address);
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}
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void JitInterface::InvalidateICacheLinesFromJIT(u32 address, u32 count, JitInterface& jit_interface)
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void JitInterface::InvalidateICacheLinesFromJIT(JitInterface& jit_interface, u32 address, u32 count)
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{
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jit_interface.InvalidateICacheLines(address, count);
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}
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@ -82,8 +82,8 @@ public:
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void InvalidateICache(u32 address, u32 size, bool forced);
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void InvalidateICacheLine(u32 address);
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void InvalidateICacheLines(u32 address, u32 count);
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static void InvalidateICacheLineFromJIT(u32 address, u32 dummy, JitInterface& jit_interface);
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static void InvalidateICacheLinesFromJIT(u32 address, u32 count, JitInterface& jit_interface);
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static void InvalidateICacheLineFromJIT(JitInterface& jit_interface, u32 address);
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static void InvalidateICacheLinesFromJIT(JitInterface& jit_interface, u32 address, u32 count);
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enum class ExceptionType
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{
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