ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Jit64: simplify ps_sel

This commit is contained in:
Tillmann Karras 2013-11-02 06:03:13 +01:00 committed by degasus
parent 201c4c65a5
commit 0a2a273a2e
1 changed files with 13 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
Source/Core/Core/Src/PowerPC/Jit64/Jit_Paired.cpp
View File

@ -11,7 +11,6 @@
// ps_madds0 // ps_madds0
// ps_muls0 // ps_muls0
// ps_madds1 // ps_madds1
// ps_sel
// cmppd, andpd, andnpd, or // cmppd, andpd, andnpd, or
// lfsx, ps_merge01 etc // lfsx, ps_merge01 etc
@ -37,6 +36,9 @@ void Jit64::ps_mr(UGeckoInstruction inst)
void Jit64::ps_sel(UGeckoInstruction inst) void Jit64::ps_sel(UGeckoInstruction inst)
{ {
// we can't use (V)BLENDVPD here because it just looks at the sign bit
// but we need -0 = +0
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(bJITPairedOff) JITDISABLE(bJITPairedOff)
@ -47,21 +49,18 @@ void Jit64::ps_sel(UGeckoInstruction inst)
int a = inst.FA; int a = inst.FA;
int b = inst.FB; int b = inst.FB;
int c = inst.FC; int c = inst.FC;
fpr.FlushLockX(XMM7);
fpr.FlushLockX(XMM6);
fpr.Lock(a, b, c, d); fpr.Lock(a, b, c, d);
fpr.BindToRegister(a, true, false); MOVAPD(XMM0, fpr.R(a));
fpr.BindToRegister(d, false, true); // XMM0 = XMM0 < 0 ? all 1s : all 0s
// BLENDPD would have been nice... CMPPD(XMM0, M((void*)psZeroZero), LT);
MOVAPD(XMM7, fpr.R(a)); MOVAPD(XMM1, R(XMM0));
CMPPD(XMM7, M((void*)psZeroZero), 1); //less-than = 111111 ANDPD(XMM0, fpr.R(b));
MOVAPD(XMM6, R(XMM7)); ANDNPD(XMM1, fpr.R(c));
ANDPD(XMM7, fpr.R(b)); fpr.BindToRegister(d, false);
ANDNPD(XMM6, fpr.R(c)); MOVAPD(fpr.RX(d), R(XMM0));
MOVAPD(fpr.RX(d), R(XMM7)); ORPD(fpr.RX(d), R(XMM1));
ORPD(fpr.RX(d), R(XMM6));
fpr.UnlockAll(); fpr.UnlockAll();
fpr.UnlockAllX();
} }
void Jit64::ps_sign(UGeckoInstruction inst) void Jit64::ps_sign(UGeckoInstruction inst)
@ -181,8 +180,6 @@ void Jit64::ps_arith(UGeckoInstruction inst)
case 18: tri_op(inst.FD, inst.FA, inst.FB, false, &XEmitter::DIVPD); break; //div case 18: tri_op(inst.FD, inst.FA, inst.FB, false, &XEmitter::DIVPD); break; //div
case 20: tri_op(inst.FD, inst.FA, inst.FB, false, &XEmitter::SUBPD); break; //sub case 20: tri_op(inst.FD, inst.FA, inst.FB, false, &XEmitter::SUBPD); break; //sub
case 21: tri_op(inst.FD, inst.FA, inst.FB, true, &XEmitter::ADDPD); break; //add case 21: tri_op(inst.FD, inst.FA, inst.FB, true, &XEmitter::ADDPD); break; //add
case 23: Default(inst); break; //sel
case 24: Default(inst); break; //res
case 25: tri_op(inst.FD, inst.FA, inst.FC, true, &XEmitter::MULPD); break; //mul case 25: tri_op(inst.FD, inst.FA, inst.FC, true, &XEmitter::MULPD); break; //mul
default: default:
_assert_msg_(DYNA_REC, 0, "ps_arith WTF!!!"); _assert_msg_(DYNA_REC, 0, "ps_arith WTF!!!");